AD7706BR-REEL7 Analog Devices Inc, AD7706BR-REEL7 Datasheet - Page 18
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AD7706BR-REEL7
Manufacturer Part Number
AD7706BR-REEL7
Description
IC ADC 16BIT 3CH 16-SOIC T/R
Manufacturer
Analog Devices Inc
Datasheet
1.AD7705BRUZ.pdf
(44 pages)
Specifications of AD7706BR-REEL7
Rohs Status
RoHS non-compliant
Number Of Bits
16
Sampling Rate (per Second)
500
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.50mm Width)
For Use With
EVAL-AD7706EBZ - BOARD EVALUATION FOR AD7706
AD7705/AD7706
Table 16. Operating Mode Options
MD1
0
0
1
1
Table 17. Gain Selection
G2
0
0
0
0
1
1
1
1
MD0
0
1
0
1
Operating Mode
Normal Mode. In this mode, the device performs normal conversions.
Self-Calibration. This activates self-calibration on the channel selected by CH1 and CH0 of the communication register. This
is a one-step calibration sequence. When the sequence is complete, the part returns to normal mode, with both MD1 and
MD0 returning to 0. The DRDY output or bit goes high when calibration is initiated, and returns low when self-calibration is
complete and a new valid word is available in the data register. The zero-scale calibration is performed at the selected gain
on internally shorted (zeroed) inputs, and the full-scale calibration is performed at the selected gain on an internally
generated V
Zero-Scale System Calibration. This activates zero-scale system calibration on the channel selected by CH1 and CH0 of the
communication register. Calibration is performed at the selected gain on the input voltage provided at the analog input
during this calibration sequence. This input voltage should remain stable for the duration of the calibration. The DRDY
output or bit goes high when calibration is initiated, and returns low when zero-scale calibration is complete and a new
valid word is available in the data register. At the end of the calibration, the part returns to normal mode, with both MD1
and MD0 returning to 0.
Full-Scale System Calibration. This activates full-scale system calibration on the selected input channel. Calibration is
performed at the selected gain on the input voltage provided at the analog input during this calibration sequence. This
input voltage should remain stable for the duration of the calibration. The DRDY output or bit goes high when calibration is
initiated, and returns low when full-scale calibration is complete and a new valid word is available in the data register. At the
end of the calibration, the part returns to normal mode, with both MD1 and MD0 returning to 0.
G1
0
0
1
1
0
0
1
1
REF
/selected gain.
G0
0
1
0
1
0
1
0
1
Rev. C | Page 18 of 44
Gain Setting
1
2
4
8
16
32
64
128