LTC2209IUP#PBF Linear Technology, LTC2209IUP#PBF Datasheet
LTC2209IUP#PBF
Specifications of LTC2209IUP#PBF
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LTC2209IUP#PBF Summary of contents
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... PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer al- lows high performance at full speed with a wide range of clock duty cycles. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners 0.5V TO 3.6V 1μ ...
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... Storage Temperature Range ...................–65°C to 150°C Digital Output Supply Voltage (OV DD ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL LTC2209CUP#PBF LTC2209CUP#TRPBF LTC2209IUP#PBF LTC2209IUP#TRPBF LEAD BASED FINISH TAPE AND REEL LTC2209CUP LTC2209CUP#TR LTC2209IUP LTC2209IUP#TR Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi label on the shipping container. ...
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ANALOG INPUT l The denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are 25°C. (Note 4) A SYMBOL PARAMETER + – V – Analog Input Range ( ...
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LTC2209 DYNAMIC ACCURACY otherwise specifi cations are 25° SYMBOL PARAMETER SFDR Spurious Free Dynamic Range th 4 Harmonic or Higher S/(N+D) Signal-to-Noise Plus Distortion Ratio SFDR Spurious Free Dynamic Range at –25dBFS Dither “OFF” SFDR ...
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COMMON MODE BIAS CHARACTERISTICS the full operating temperature range, otherwise specifi cations are at T PARAMETER V Output Voltage CM V Output Tempco CM V Line Regulation CM V Output Resistance CM DIGITAL INPUTS AND DIGITAL OUTPUTS full operating temperature ...
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LTC2209 POWER REQUIREMENTS range, otherwise specifi cations are SYMBOL PARAMETER V Analog Supply Voltage DD P Shutdown Power SHDN STANDARD LVDS OUTPUT MODE OV Output Supply Voltage DD I Analog Supply Current VDD I Output Supply Current ...
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ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values ...
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LTC2209 TIMING DIAGRAMS ANALOG INPUT N – ENC + ENC DA0-DA15, OFA CLKOUTA CLKOUTB DB0-DB15, OFB ANALOG INPUT N – ENC + ENC DA0-DA15, OFA DB0-DB15, OFB CLKOUTA CLKOUTB 8 Full-Rate CMOS Output Mode Timing All Outputs are Single-Ended and ...
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TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity (INL) vs Output Code 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 16384 32768 49152 65536 OUTPUT CODE 2209 G01 128k Point FFT 4.9MHz, IN –1dBFS, PGA = 0 0 –10 ...
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LTC2209 TYPICAL PERFORMANCE CHARACTERISTICS SFDR vs Input Level 15MHz, IN PGA = 0, Dither “Off” 130 120 110 100 –80 –70 –60 –50 –40 –30 –20 –10 INPUT ...
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TYPICAL PERFORMANCE CHARACTERISTICS SFDR vs Input Level 70.2MHz, IN PGA = 0, Dither “On” 130 120 110 100 –20 –10 –80 –70 –60 –50 –40 –30 INPUT LEVEL ...
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LTC2209 TYPICAL PERFORMANCE CHARACTERISTICS 64k Point FFT 250.1MHz, IN –10dBFS, PGA = 1, Dither “On” 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 FREQUENCY ...
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TYPICAL PERFORMANCE CHARACTERISTICS SNR and SFDR vs Duty Cycle 110 SNR DCS OFF 30 SNR DCS ON SFDR DCS OFF SFDR DCS DUTY CYCLE (%) 2209 G37 SFDR vs Analog Input ...
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LTC2209 PIN FUNCTIONS For CMOS Mode. Full Rate or Demultiplexed SENSE (Pin 1): Reference Mode Select and External Reference Input. Tie SENSE 2.5V bandgap reference. An external reference of 2.5V or 1.25V may be used; both reference ...
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PIN FUNCTIONS For LVDS Mode. STANDARD or LOW POWER SENSE (Pin 1): Reference Mode Select and External Reference Input. Tie SENSE 2.5V bandgap reference. An external reference of 2.5V or 1.25V may be used; both reference values ...
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LTC2209 BLOCK DIAGRAM + A IN INPUT FIRST PIPELINED S/H ADC STAGE – DITHER SIGNAL GENERATOR RANGE SELECT SENSE PGA V CM BUFFER VOLTAGE REFERENCE 16 SECOND PIPELINED THIRD PIPELINED FOURTH PIPELINED ADC STAGE ADC STAGE ADC CLOCKS ...
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DEFINITIONS DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N+D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the ADC output. The output ...
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LTC2209 APPLICATIONS INFORMATION CONVERTER OPERATION The LTC2209 is a CMOS pipelined multistep converter with a front-end PGA. As shown in Figure 1, the converter has fi ve pipelined ADC stages; a sampled analog input will result in a digitized value ...
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APPLICATIONS INFORMATION input change is large, such as the change seen with input frequencies near Nyquist, then a larger charging glitch will be seen. Common Mode Bias The ADC sample-and-hold circuit requires differential drive to achieve specifi ed performance. Each ...
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LTC2209 APPLICATIONS INFORMATION Figure 4a shows transformer coupling using a transmis- sion line balun transformer. This type of transformer has much better high frequency response and balance than fl ux coupled center tap transformers. Coupling capaci- tors are added at ...
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APPLICATIONS INFORMATION The internal programmable gain amplifi er provides the internal reference voltage for the ADC. This amplifi er has very stringent settling requirements and is not accessible for external use. The SENSE pin can be driven ±5% around the ...
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LTC2209 APPLICATIONS INFORMATION ENC V = 1.6V THRESHOLD 1.6V ENC 0.1μF Figure 9. Single-Ended ENC Drive, Not Recommended for Low Jitter 3.3V 3.3V MC100LVELT22 130Ω 130Ω Q0 ENC D0 ENC Q0 83Ω 83Ω Figure 10. ENC Drive Using a CMOS ...
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APPLICATIONS INFORMATION Lower OV voltages will also help reduce interference DD from the digital outputs. Digital Output Buffers (LVDS Modes) Figure 12 shows an equivalent circuit for an LVDS output DATA PREDRIVER FROM LOGIC LATCH Figure ...
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LTC2209 APPLICATIONS INFORMATION Overfl ow Bit An overfl ow output bit (OF) indicates when the converter is over-ranged or under-ranged. In CMOS mode, a logic high on the OFA pin indicates an overfl underfl the A ...
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APPLICATIONS INFORMATION PC BOARD FPGA CLKOUT OF D15/D0 LTC2209 D14/D0 D2/D0 D1/D0 D0 Figure 14. Descrambling a Scrambled Digital Output LTC2209 + AIN ANALOG S/H INPUT AMP – AIN CLOCK/DUTY CYCLE CONTROL + ENC Figure 15. Functional Equivalent Block Diagram ...
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LTC2209 APPLICATIONS INFORMATION Grounding and Bypassing The LTC2209 requires a printed circuit board with a clean unbroken ground plane; a multilayer board with an internal ground plane is recommended. The pinout of the LTC2209 has been optimized for a fl ...
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APPLICATIONS INFORMATION Silkscreen Top LTC2209 Topside 2209fa 27 ...
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LTC2209 APPLICATIONS INFORMATION Inner Layer 2, GND Inner Layer 4, GND 28 Inner Layer 3, GND Inner Layer 5, GND 2209fa ...
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APPLICATIONS INFORMATION Bottomside LTC2209 Silkscreen Bottom 2209fa 29 ...
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LTC2209 APPLICATIONS INFORMATION VC5 48 VC4 47 VC3 26 VC2 25 VC1 12 OVDD49 49 OGND50 50 D12– 51 D12+ 52 D13– 53 D13+ 54 D14– 55 D14+ 56 D15– 57 D15+ 58 OF– 59 OF+ 60 LVDS 61 MODE ...
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... SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 6. DRAWING NOT TO SCALE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. UP Package 64-Lead Plastic QFN (9mm × ...
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... High Output: –2.5dB Conversion Gain OIP3 = 21.6dBm at 2GHz 1.8GHz-3dB Bandwidth, Fixed Gain Version up to 26dB, –94dBc IMD 1.3GHz-3dB Bandwidth, Fixed Gain Version up to 26dB, –93dBc IMD ● www.linear.com at 70MHz 3 at 70MHz 3 2209fa LT 0208 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2007 ...