LTC1286IS8#TRPBF Linear Technology, LTC1286IS8#TRPBF Datasheet - Page 12

• Manufacturer Part Number: LTC1286IS8#TRPBF
• Description: IC CONV A/D SAMPLING 12BIT 8SOIC
• Manufacturer: Linear Technology

Specifications of LTC1286IS8#TRPBF

• Number Of Bits: 12
• Sampling Rate (per Second): 12.5k
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1.25mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LTC1286/LTC1298
APPLICATION INFORMATION
Input Data Word
The LTC1286 requires no D
configured to have a single differential input. The conver-
sion result appears on the D
MSB first followed by the LSB sequence. This provides
easy interface to MSB or LSB first serial ports. For MSB
first data the CS signal can be taken high after B0 (see
Figure 1). The LTC1298 clocks data into the D
the rising edge of the clock. The input data words are
defined as follows:
Start Bit
The first “logical one” clocked into the D
goes low is the start bit. The start bit initiates the data
transfer. The LTC1298 will ignore all leading zeros which
precede this logical one. After the start bit is received, the
remaining bits of the input word will be clocked in. Further
inputs on the D
cycle.
Multiplexer (MUX) Address
The bits of the input word following the START bit assign
the MUX configuration for the requested conversion. For
a given channel selection, the converter will measure the
voltage between the two channels indicated by the + and
– signs in the selected row of the following tables. In
single-ended mode, all input channels are measured with
respect to GND.
MSB First/LSB First (MSBF)
The output data of the LTC1298 is programmed for
MSB first or LSB first sequence using the MSBF bit.
When the MSBF bit is a logical one, data will appear on
the D
filled in indefinitely following the last data bit. When the
12
OUT
SINGLE-ENDED
DIFFERENTIAL
MUX MODE
MUX MODE
line in MSB first format. Logical zeros will be
IN
LTC1298 Channel Selection
SGL/DIFF
START
pin are then ignored until the next CS
MUX ADDRESS
U
1
1
0
0
SGL/
DIFF
ADDRESS
ODD/SIGN
U
MUX
0
1
0
1
ODD/
SIGN MSBF
OUT
IN
MSB FIRST/
LSB FIRST
LTC1096/9 • AI02
word. It is permanently
line. The data format is
0
+
+
–
CHANNEL #
W
IN
1
+
–
+
LTC1096/8 • AI03
input after CS
GND
–
–
IN
U
input on
MSBF bit is a logical zero, LSB first data will follow the
normal MSB first data on the D
Sequence)
Transfer Curve
The LTC1286/LTC1298 are permanently configured for
unipolar only. The input span and code assignment for
this conversion type are shown in the following figures.
Operation with D
The LTC1298 can be operated with D
together. This eliminates one of the lines required to
communicate to the microprocessor (MPU). Data is trans-
mitted in both directions on a single wire. The processor
pin connected to this data line should be configurable as
either an input or an output. The LTC1298 will take control
of the data line and drive it low on the 4th falling CLK edge
after the start bit is received (see Figure 3). Therefore the
processor port line must be switched to an input before
this happens to avoid a conflict.
In the Typical Applications section, there is an example of
interfacing the LTC1298 with D
the Intel 8051 MPU.
1 1 1 1 1 1 1 1 1 1 1 0
0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0
•
•
•
OUTPUT CODE
•
•
•
IN
and D
Transfer Curve
Output Code
INPUT VOLTAGE
OUT
V
V
1LSB =
REF
REF
1LSB
0V
– 1LSB
– 2LSB
Tied Together
IN
•
•
•
OUT
and D
V
4096
REF
line. (see Operating
OUT
INPUT VOLTAGE
(V
REF
IN
4.99878V
4.99756V
0.00122V
tied together to
= 5.000V)
0V
and D
•
•
•
LTC1286/98 • AI05
OUT
LTC1286/98 • AI04
tied
V
IN