LTC2411-1IMS#TR Linear Technology, LTC2411-1IMS#TR Datasheet - Page 24

• Manufacturer Part Number: LTC2411-1IMS#TR
• Description: IC A/DCONV DIFF INPUT&REF 10MSOP
• Manufacturer: Linear Technology

Specifications of LTC2411-1IMS#TR

• Number Of Bits: 24
• Sampling Rate (per Second): 6.8
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC2411-1IMSTR; LTC24111IMSTR

APPLICATIO S I FOR ATIO
LTC2411/LTC2411-1
Larger values of input capacitors (C
required in certain configurations for antialiasing or gen-
eral input signal filtering. Such capacitors will average the
input sampling charge and the external source resistance
will see a quasi constant input differential impedance. For
the LTC2411, when F
notch), the typical differential input resistance is 5.4M
which will generate a gain error of approximately 0.093ppm
for each ohm of source resistance driving IN
When F
typical differential input resistance is 6.5M which will
generate a gain error of approximately 0.077ppm for each
ohm of source resistance driving IN
LTC2411-1, the typical differential input resistance is
6M which will generate a gain error of approximately
0.084ppm for each ohm of source resistance driving IN
or IN
oscillator with a frequency f
clock operation), the typical differential input resistance is
0.83 • 10
driving IN
error. The effect of the source resistance on the two input
pins is additive with respect to this gain error. The typical
+FS and –FS errors as a function of the sum of the source
resistance seen by IN
shown in Figure 15.
In addition to this gain error, an offset error term may also
appear. The offset error is proportional with the mismatch
between the source impedance driving the two input pins
IN
24
+
Figure 15a. + FS Error vs R
and IN
–
O
(F
= HIGH (internal oscillator and 50Hz notch), the
O
12
+
120
100
–
80
60
40
20
or IN
0
/f
= LOW). When F
and with the difference between the input and
0 100 200 300 400 500 600 700 800 900 1000
EOSC
V
REF
REF
IN
IN
F
T
O
A
CC
+
–
= GND
= 25 C
–
+
= 3.75V
= 1.25V
–
= 5V
will result in 0.59 • 10
= 5V
= GND
U
and each ohm of source resistance
O
+
= LOW (internal oscillator and 60Hz
and IN
R
SOURCE
U
SOURCE
C
IN
O
–
EOSC
( )
= 0.01 F
for large values of C
C
is driven by an external
IN
at IN
C
= 0.1 F
IN
W
(external conversion
= 10 F
IN
C
+
IN
–6
or IN
+
> 0.01 F) may be
= 1 F
2411 F15a
or IN
• f
–
EOSC
(Large C
U
–
+
. For the
ppm gain
or IN
IN
IN
)
are
–
+
.
reference common mode voltages. While the input drive
circuit nonzero source impedance combined with the
converter average input current will not degrade the INL
performance, indirect distortion may result from the modu-
lation of the offset error by the common mode component
of the input signal. Thus, when using large C
values, it is advisable to carefully match the source imped-
ance seen by the IN
F
mismatch in source impedance transforms a full-scale
common mode input signal into a differential mode input
signal of 0.093ppm. When F
and 50Hz notch), every 1 mismatch in source imped-
ance transforms a full-scale common mode input signal
into a differential mode input signal of 0.077ppm. For the
LTC2411-1, when internal oscillator is used (F
every 1
full-scale common mode input signal into a differential
mode input signal of 0.084ppm. When F
external oscillator with a frequency f
match in source impedance transforms a full-scale com-
mon mode input signal into a differential mode input
signal of 0.59 • 10
typical offset error due to input common mode voltage for
various values of source resistance imbalance between
the IN
If possible, it is desirable to operate with the input signal
common mode voltage very close to the reference signal
common mode voltage as is the case in the ratiometric
measurement of a symmetric bridge. This configuration
O
= LOW (internal oscillator and 60Hz notch), every 1
Figure 15b. – FS Error vs R
+
and IN
–100
–120
–20
–40
–60
–80
mismatch in source impedance transforms a
0
0 100 200 300 400 500 600 700 800 900 1000
V
REF
REF
IN
IN
F
T
–
O
A
CC
+
–
pins when large C
= GND
= 25 C
+
–
= 1.25V
= 3.75V
= 5V
= 5V
= GND
+
–6
and IN
• f
R
EOSC
SOURCE
SOURCE
–
pins. For the LTC2411, when
O
ppm. Figure 16 shows the
( )
= HIGH (internal oscillator
C
C
C
IN
at IN
IN
IN
IN
= 10 F
= 0.1 F
= 0.01 F
C
EOSC
values are used.
IN
+
= 1 F
or IN
2411 F15b
O
, every 1 mis-
is driven by an
–
(Large C
IN
O
capacitor
= LOW),
IN
)