LTC2415-1CGN Linear Technology, LTC2415-1CGN Datasheet - Page 16

IC ADC 24BIT DIFFINPUT/REF16SSOP

LTC2415-1CGN

Manufacturer Part Number
LTC2415-1CGN
Description
IC ADC 24BIT DIFFINPUT/REF16SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2415-1CGN

Number Of Bits
24
Sampling Rate (per Second)
13.75
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
2
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.150", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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APPLICATIO S I FOR ATIO
LTC2415/LTC2415-1
Frequency Rejection Selection LTC2415 (F
The LTC2415 internal oscillator provides better than 110dB
normal mode rejection at the line frequency and its harmon-
ics for 50Hz 2% or 60Hz 2%. For 60Hz rejection, F
should be connected to GND while for 50Hz rejection the F
pin should be connected to V
The selection of 50Hz or 60Hz rejection can also be made by
driving F
during the sleep or data output states will not disturb the
converter operation. If the selection is made during the
conversion state, the result of the conversion in progress
may be outside specifications but the following conver-
sions will not be affected.
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2415 can
operate with an external conversion clock. The converter
automatically detects the presence of an external clock
signal at the F
frequency f
2560Hz (1Hz notch frequency) to be detected. The external
clock signal duty cycle is not significant as long as the
minimum and maximum specifications for the high and low
periods t
While operating with an external conversion clock of a
frequency f
normal mode rejection in a frequency range f
function of the input frequency deviation from f
is shown in Figure 7a.
Whenever an external clock is not present at the F
converter automatically activates its internal oscillator and
enters the Internal Conversion Clock mode. The LTC2415
operation will not be disturbed if the change of conversion
clock source occurs during the sleep state or during the
data output state while the converter uses an external serial
clock. If the change occurs during the conversion state, the
result of the conversion in progress may be outside speci-
fications but the following conversions will not be affected.
If the change occurs during the data output state and the
converter is in the Internal SCK mode, the serial clock duty
cycle may be affected but the serial data stream will remain
valid.
16
4% and its harmonics. The normal mode rejection as a
O
HEO
to an appropriate logic level. A selection change
EOSC
EOSC
and t
O
pin and turns off the internal oscillator. The
, the LTC2415 provides better than 110dB
of the external signal must be at least
LEO
U
are observed.
U
CC
.
W
O
)
EOSC
EOSC
U
O
pin, the
/2560
/2560
O
O
Table 3a summarizes the duration of each state and the
achievable output data rate as a function of F
Frequency Rejection Selection LTC2415-1 (F
The LTC2415-1 internal oscillator provides better than
87dB normal mode rejection over the range of 49Hz to
61.2Hz as shown in Figure 7b. For simultaneous 50Hz/60Hz
rejection, F
In order to achieve 87dB normal mode rejection of 50Hz
averaged. By performing a continuous running average of
the two most current results, both simultaneous rejection
is achieved and a 2 increase in throughput is realized
relative to the LTC2413 (see Normal Mode Rejection, Ouput
Rate and Running Averages sections of this data sheet).
When a fundamental rejection frequency different from
the range 49Hz to 61.2Hz is required or when the converter
must be synchronized with an outside source, the
LTC2415-1 can operate with an external conversion clock.
The converter automatically detects the presence of an
external clock signal at the F
oscillator. The frequency f
be at least 2560Hz to be detected. The external clock signal
duty cycle is not significant as long as the minimum and
maximum specifications for the high and low periods, t
and t
While operating with an external conversion clock of a
frequency f
110dB normal mode rejection in a frequency range f
2560 4%. The normal mode rejection as a function of the
input frequency deviation from f
Figure 7a and Figure 7c shows the normal mode rejection
with running averages included.
Whenever an external clock is not present at the F
converter automatically activates its internal oscillator and
enters the Internal Conversion Clock mode. The LTC2415-1
operation will not be disturbed if the change of conversion
clock source occurs during the sleep state or during the
data output state while the converter uses an external
serial clock. If the change occurs during the conversion
state, the result of the conversion in progress may be
outside specifications but the following conversions will
not be affected. If the change occurs during the data output
2% and 60Hz 2%, two consecutive conversions must be
LEO
, are observed.
O
EOSC
should be connected to GND.
, the LTC2415-1 provides better than
EOSC
O
pin and turns off the internal
of the external signal must
EOSC
/2560 is shown in
O
.
O
sn2415 24151fs
)
O
pin the
EOSC
HEO
/

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