LTC2436-1IGN#PBF Linear Technology, LTC2436-1IGN#PBF Datasheet - Page 23
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LTC2436-1IGN#PBF
Manufacturer Part Number
LTC2436-1IGN#PBF
Description
IC CONV A/D 16B 2CH DIFF 16SSOP
Manufacturer
Linear Technology
Datasheet
1.LTC2436-1CGN.pdf
(28 pages)
Specifications of LTC2436-1IGN#PBF
Number Of Bits
16
Sampling Rate (per Second)
6.8
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.150", 3.90mm Width)
Number Of Elements
1
Resolution
16Bit
Architecture
Delta-Sigma
Sample Rate
0.007KSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±2.75V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Integral Nonlinearity Error
±3LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
SSOP N
Input Signal Type
Differential
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIO S I FOR ATIO
Larger values of reference capacitors (C
be required as reference filters in certain configurations.
Such capacitors will average the reference sampling charge
and the external source resistance will see a quasi con-
stant reference differential impedance. When F
(internal oscillator and 50Hz/60Hz notch), the typical
differential reference resistance is 1.4M which will gen-
erate a gain error of approximately 1LSB full scale for each
40 of source resistance driving REF
is driven by an external oscillator with a frequency f
(external conversion clock operation), the typical differen-
tial reference resistance is 0.20 • 10
ohm of source resistance drving REF
in 1.54 • 10
Figure 21. +FS Error vs R
Figure 19. +FS Error vs R
–3
–1
–2
11
17
22
30
–7
0
0
6
1
0 100 200 300 400 500 600 700 800 900 1000
• f
V
REF
REF
IN
IN
F
T
V
REF
REF
IN
IN
F
T
O
A
CC
O
A
CC
+
–
EOSC
= GND
= 25 C
+
–
= GND
= 25 C
+
–
= 5V
= 5V
= 2.5V
+
–
= 3.75V
= 5V
= 1.25V
= 5V
= GND
C
= 5V
= GND
10
REF
C
U
REF
C
LSB gain error at full scale. The effect
C
REF
= 0.001 F
REF
= 100pF
SOURCE
= 0.01 F
R
= 0pF
100
R
SOURCE
SOURCE
SOURCE
U
C
at REF
REF
( )
( )
1k
at REF
C
= 1 F, 10 F
C
REF
REF
W
+
= 0.01 F
10k
= 0.1 F
+
and REF
12
+
+
or REF
or REF
/f
or REF
24361 F19
REF
24361 F21
EOSC
100k
> 0.01 F) may
–
–
(Small C
(Large C
–
–
U
. When F
will result
O
and each
= LOW
EOSC
IN
REF
)
)
O
of the source resistance on the two reference pins is
additive with respect to this gain error. The typical +FS and
–FS errors for various combinations of source resistance
seen by the REF
C
21 and 22.
In addition to this gain error, the converter INL perfor-
mance is degraded by the reference source impedance.
When F
every 1000 of source resistance driving REF
translates into about 1LSB additional INL error. When F
is driven by an external oscillator with a frequency f
every 100
Figure 22. –FS Error vs R
REF
Figure 20. –FS Error vs R
connected to these pins are shown in Figures 19, 20,
O
= LOW (internal oscillator and 50Hz/60Hz notch),
30
22
17
11
3
2
1
0
6
0
1
of source resistance driving REF
0 100 200 300 400 500 600 700 800 900 1000
V
REF
REF
IN
IN
F
T
V
REF
REF
IN
IN
F
T
O
A
CC
O
A
CC
+
–
= GND
= 25 C
+
–
+
= GND
= 25 C
+
–
= GND
= 2.5V
= 5V
+
–
= 1.25V
= 5V
= 3.75V
= 5V
and REF
C
= GND
= 5V
= GND
10
REF
C
C
REF
REF
C
= 0.001 F
REF
= 100pF
= 0.01 F
SOURCE
100
R
= 0pF
R
SOURCE
SOURCE
SOURCE
–
pins and external capacitance
C
REF
at REF
( )
1k
( )
C
at REF
REF
= 1 F, 10 F
C
REF
= 0.01 F
+
LTC2436-1
10k
+
= 0.1 F
and REF
or REF
2412 F19
24361 F22
100k
–
–
(Small C
(Large C
+
+
or REF
or REF
23
EOSC
IN
REF
24361f
)
)
O
–
–
,