MAX1193ETI+ Maxim Integrated Products, MAX1193ETI+ Datasheet - Page 5

• Manufacturer Part Number: MAX1193ETI+
• Description: IC ADC 8BIT 45MSPS DUAL 28-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX1193ETI+

• Number Of Bits: 8
• Sampling Rate (per Second): 45M
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN Exposed Pad
• Conversion Rate: 45 MSPs
• Resolution: 8 bit
• Snr: 48.5 dB
• Voltage Reference: 1.024 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Power Dissipation: 1667 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 3 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ELECTRICAL CHARACTERISTICS (continued)
(V
0.33µF, T
Analog Supply Current
Digital Output Supply Current
(Note 3)
TIMING CHARACTERISTICS
CLK Rise to CHA Output Data
Valid
CLK Fall to CHB Output Data
Valid
CLK Rise/Fall to A/B Rise/Fall
Time
PD1 Rise to Output Enable
PD1 Fall to Output Disable
CLK Duty Cycle
CLK Duty-Cycle Variation
Wake-Up Time from Shutdown
Mode
Wake-Up Time from Standby
Mode
Digital Output Rise/Fall Time
INTERCHANNEL CHARACTERISTICS
Crosstalk Rejection
Amplitude Matching
Phase Matching
DD
= 3.0V, OV
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
PARAMETER
DD
Ultra-Low-Power, 45Msps, Dual 8-Bit ADC
= 1.8V, V
_______________________________________________________________________________________
REFIN
= V
t
SYMBOL
t
WAKE, SD
WAKE, ST
DD
t
I
t
t
DA/B
ODD
DOA
DOB
t
I
t
DD
DIS
EN
(internal reference), C
Normal operating mode, f
-0.5dB FS, CLK input from GND to V
Idle mode (tri-state), f
-0.5dB FS, CLK input from GND to V
Standby mode, CLK input from
Shutdown mode, CLK = GND or V
PD0 = PD1 = OGND
Normal operating mode,
f
Idle mode (tri-state), DC input, CLK =
GND or V
Standby mode, DC input, CLK = GND or
V
Shutdown mode, CLK = GND or V
PD0 = PD1 = OGND
50% of C LK to 50% of d ata) ,
Fi g ur e 5 ( N ote 4)
50% of C LK to 50% of d ata,
Fi g ur e 5 ( N ote 4)
50% of C LK to 50% of A/B,
Fi g ur e 5 ( N ote 4)
PD0 = OV
PD0 = OV
(Note 5)
(Note 5)
20% to 80%
f
f
f
f
GND to V
IN
IN,X
IN,Y
IN
IN
DD,
= 5.5MHz at -0.5dB FS, C
= 11MHz at -0.5dB FS (Note 7)
= 11MHz at -0.5dB FS (Note 7)
= 11MHz at -0.5dB FS,
= 0.3MHz at -0.5dB FS (Note 6)
PD0 = OGND, PD1 = OV
DD,
DD
DD
DD
PD0 = OV
CONDITIONS
L
≈ 10pF at digital outputs, f
IN
DD
= 5.5MHz at
IN
, PD1 = OGND
= 5.5MHz at
L
A
DD
≈ 10pF
= +25°C.) (Note 1)
DD
DD
DD
DD
,
,
CLK
MIN
1
1
1
= 45MHz, C
±0.05
TYP
±0.2
±10
8.5
0.1
0.1
0.1
0.1
2.6
-75
19
19
50
20
5
6
6
6
5
5
2
REFP
= C
MAX
22.5
5.0
5.0
5.0
8.5
8.5
8.5
REFN
= C
D egr ees
UNITS
COM
mA
mA
dB
dB
µA
µA
ns
ns
ns
ns
ns
µs
µs
ns
%
%
5
=