MAX19505ETM+ Maxim Integrated Products, MAX19505ETM+ Datasheet - Page 20

• Manufacturer Part Number: MAX19505ETM+
• Description: IC ADC 8BIT 1CH 65MSPS 48TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX19505ETM+

• Number Of Bits: 8
• Sampling Rate (per Second): 65M
• Data Interface: Serial, Parallel
• Number Of Converters: 1
• Power Dissipation (max): 99mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Dual-Channel, 8-Bit, 65Msps ADC
Data/DCLK Timing (03h)
Bit 7
Bit 6
Bit 5, 4, 3
Bit 2, 1, 0
20
DA_BYPASS
BIT 7
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DA_BYPASS: Data aligner bypass
0 = Nominal
1 = Bypasses data aligner delay line to minimize output data latency with respect to the input clock.
DLY_HALF_T: Data and DCLK delayed by T/2
0 = Normal, no delay (default)
1 = Delays data and DCLK outputs by T/2
DCLKTIME_2, DCLKTIME_1, DCLKTIME_0: DCLK timing adjust (controls both channels)
000 = Nominal (default)
001 = +T/16
010 = +2T/16
011 = +3T/16
100 = Reserved, do not use
101 = -1T/16
110 = -2T/16
111 = -3T/16
DTIME_2, DTIME_1, DTIME_0: Data timing adjust (controls both channels)
000 = Nominal (default)
001 = +T/16
010 = +2T/16
011 = +3T/16
100 = Reserved, do not use
101 = -1T/16
110 = -2T/16
111 = -3T/16
DLY_HALF_T
Disabled in MUX data bus mode
Rising clock to data transition is approximately 6ns with DTIME = 000b settings (default)
BIT 6
DCLKTIME_2
BIT 5
DCLKTIME_1
BIT 4
DCLKTIME_0
BIT 3
DTIME_2
BIT 2
DTIME_1
BIT 1
DTIME_0
BIT 0