MX7705EUE+ Maxim Integrated Products, MX7705EUE+ Datasheet

IC ADC 16BIT 2CH 16-TSSOP

MX7705EUE+

Manufacturer Part Number
MX7705EUE+
Description
IC ADC 16BIT 2CH 16-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MX7705EUE+

Number Of Bits
16
Sampling Rate (per Second)
500
Data Interface
MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
755mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MX7705 low-power, 2-channel, serial-output ana-
log-to-digital converter (ADC) includes a sigma-delta
modulator with a digital filter to achieve 16-bit resolution
with no missing codes. This ADC is pin compatible and
software compatible with the AD7705. The MX7705 fea-
tures an on-chip input buffer and programmable-gain
amplifier (PGA). The device offers an SPI™-/QSPI™-/
MICROWIRE™-compatible serial interface.
The MX7705 operates from a single 2.7V to 5.25V supply.
The operating supply current is 320µA (typ) with a 3V
supply. Power-down mode reduces the supply current to
2µA (typ).
Self-calibration and system calibration allow the MX7705
to correct for gain and offset errors. Excellent DC perfor-
mance (±0.003% FSR INL) and low noise (650nV) make
the MX7705 ideal for measuring low-frequency signals
with a wide dynamic range. The device accepts fully dif-
ferential bipolar/unipolar inputs. An internal input buffer
allows for input signals with high source impedances. An
on-chip digital filter, with a programmable cutoff and out-
put data rate, processes the output of the sigma-delta
modulator. The first notch frequency of the digital filter is
chosen to provide 150dB rejection of common-mode
50Hz or 60Hz noise and 98dB rejection of normal-mode
50Hz or 60Hz noise. A PGA and digital filtering allow sig-
nals to be directly acquired with little or no signal-condi-
tioning requirements.
The MX7705 is available in a 16-pin TSSOP package.
19-3051; Rev 4; 2/10
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Industrial Instruments
Weigh Scales
Strain-Gauge Measurements
Loop-Powered Systems
Flow and Gas Meters
Medical Instrumentation
Pressure Transducers
Thermocouple Measurements
RTD Measurements
________________________________________________________________ Maxim Integrated Products
General Description
Applications
16-Bit, Low-Power, 2-Channel,
o Pin Compatible and Software Compatible with the
o 16-Bit Sigma-Delta ADC
o Two Fully Differential Input Channels
o 0.003% Integral Nonlinearity with No Missing Codes
o Interface with Schmitt Triggers on Inputs
o Internal Analog Input Buffers
o PGA from 1 to 128
o Single (2.7V to 3.6V) or (4.75V to 5.25V) Supply
o Low Power
o SPI-/QSPI-/MICROWIRE-Compatible 3-Wire Serial
+ Denotes a lead(Pb)-free/RoHS-compliant package.
MX7705EUE+
AD7705
Interface
1mW (max), 3V Supply
2μA (typ) Power-Down Current
PART
TOP VIEW
Sigma-Delta ADC
CLKOUT
RESET
CLKIN
AIN2+
AIN1+
SCLK
AIN1-
CS
-40°C to +85°C
TEMP RANGE
1
2
6
3
4
5
7
8
Ordering Information
MX7705
TSSOP
Pin Configuration
16
15
14
13
12
11
10
9
PIN- PACKAGE
16 TSSOP
GND
V
DIN
DOUT
DRDY
AIN2-
REF-
REF+
DD
Features
1

Related parts for MX7705EUE+

MX7705EUE+ Summary of contents

Page 1

... PGA from 1 to 128 o Single (2.7V to 3.6V) or (4.75V to 5.25V) Supply o Low Power 1mW (max), 3V Supply 2μA (typ) Power-Down Current o SPI-/QSPI-/MICROWIRE-Compatible 3-Wire Serial Interface PART MX7705EUE+ + Denotes a lead(Pb)-free/RoHS-compliant package. Applications TOP VIEW Sigma-Delta ADC Features Ordering Information TEMP RANGE PIN- PACKAGE -40° ...

Page 2

Low-Power, 2-Channel, Sigma-Delta ADC ABSOLUTE MAXIMUM RATINGS V to GND ..............................................................-0.3V to +6V DD All Other Pins to GND.................................-0. Maximum Current Input into Any Pin ..................................50mA Continuous Power Dissipation (T = +70°C) A TSSOP (derate 9.4mW/°C above ...

Page 3

ELECTRICAL CHARACTERISTICS (continued 5V, GND = 1.225V for V DD REF+ 2.4576MHz, CLKDIV bit = GND = 0.1µF, C REF+ PARAMETER SYMBOL AIN Input Capacitance AIN Input Sampling Rate Input ...

Page 4

Low-Power, 2-Channel, Sigma-Delta ADC ELECTRICAL CHARACTERISTICS (continued 5V, GND = 1.225V for V DD REF+ 2.4576MHz, CLKDIV bit = GND = 0.1µF, C REF+ PARAMETER SYMBOL CLKIN INPUT CLKIN ...

Page 5

ELECTRICAL CHARACTERISTICS (continued 5V, GND = 1.225V for V DD REF+ 2.4576MHz, CLKDIV bit = GND = 0.1µF, C REF+ PARAMETER SYMBOL POWER REQUIREMENTS Power-Supply Voltage Power-Supply Current (Note 12) ...

Page 6

Low-Power, 2-Channel, Sigma-Delta ADC TIMING CHARACTERISTICS ( 5V, GND = 1.225V for V DD REF+ 2.4576MHz, CLKDIV bit = GND = 0.1µF, C REF+ (Figures 8, 9) PARAMETER SYMBOL DRDY ...

Page 7

TIMING CHARACTERISTICS (continued 5V, GND = 1.225V for V DD REF+ 2.4576MHz, CLKDIV bit = GND = 0.1µF, C REF+ (Figures 8, 9) Note 1: These errors are in the ...

Page 8

Low-Power, 2-Channel, Sigma-Delta ADC Table 1. Output RMS Noise vs. Gain and Output Data Rate (V FILTER FIRST -3dB FREQUENCY NOTCH AND OUTPUT DATA RATE BUFFERED (f = 1MHz) CLKIN 20Hz 5.24Hz 25Hz 6.55Hz 100Hz 26.2Hz 200Hz 52.4Hz UNBUFFERED ...

Page 9

Table 2. Peak-to-Peak Resolution vs. Gain and Output Data Rate (V FILTER FIRST NOTCH AND -3dB FREQUENCY OUTPUT DATA RATE BUFFERED (f = 1MHz) CLKIN 20Hz 5.24Hz 25Hz 6.55Hz 100Hz 26.2Hz 200Hz 52.4Hz UNBUFFERED (f = 1MHz) CLKIN 20Hz 5.24Hz ...

Page 10

Low-Power, 2-Channel, Sigma-Delta ADC Table 3. Output RMS Noise vs. Gain and Output Data Rate (V FILTER FIRST NOTCH AND -3dB FREQUENCY OUTPUT DATA RATE BUFFERED (f = 1MHz) CLKIN 20Hz 5.24Hz 25Hz 6.55Hz 100Hz 26.2Hz 200Hz 52.4Hz UNBUFFERED ...

Page 11

Table 4. Peak-to-Peak Resolution vs. Gain and Output Data Rate (V FILTER FIRST NOTCH AND -3dB FREQUENCY OUTPUT DATA RATE BUFFERED (f = 1MHz) CLKIN 20Hz 5.24Hz 25Hz 6.55Hz 100Hz 26.2Hz 200Hz 52.4Hz UNBUFFERED (f = 1MHz) CLKIN 20Hz 5.24Hz ...

Page 12

Low-Power, 2-Channel, Sigma-Delta ADC ( 5V 1.225V for V DD REF+ DD OFFSET ERROR vs. SUPPLY VOLTAGE (5V) 0.003 0.002 0.001 0 -0.001 -0.002 -0.003 4.75 4.85 4.95 5.05 5.15 ...

Page 13

V = 1.225V for V DD REF+ DD SUPPLY CURRENT vs. SUPPLY VOLTAGE (3V) 0.6 A 0 0.3 E 0.2 2.70 2.85 3.00 3.15 SUPPLY VOLTAGE (V) A: BUFFERED MODE B: ...

Page 14

Low-Power, 2-Channel, Sigma-Delta ADC ( 5V 1.225V for V DD REF+ DD SUPPLY CURRENT vs 0.5 0 0.3 E 0.2 0.4 0.6 0.8 1.0 1.2 ...

Page 15

V = 1.225V for V DD REF+ DD POWER-DOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE (3V) 100 2.70 2.85 3.00 3.15 3.30 3.45 3.60 SUPPLY VOLTAGE (V) ...

Page 16

Low-Power, 2-Channel, Sigma-Delta ADC PIN NAME Serial Clock Input. Apply an external serial clock to transfer data to and from the device at data rates 1 SCLK 5MHz. Clock Input. Connect a crystal/resonator between CLKIN and ...

Page 17

AIN1+ AIN1- SWITCHING NETWORK AIN2+ AIN2- S1 AND S2 ARE OPEN IN BUFFERED MODE AND CLOSED IN UNBUFFERED MODE REF+ REF- Detailed Description The MX7705 low-power, 2-channel, serial-output ADC uses a sigma-delta modulator with a digital filter to achieve 16-bit ...

Page 18

Low-Power, 2-Channel, Sigma-Delta ADC To minimize gain errors in unbuffered mode, select a source impedance less than the maximum values shown in Figures 2 and 3. These are the maximum external resistance/capacitance combinations allowed before gain errors greater than ...

Page 19

Table 5. Input Sampling Capacitor vs. Gain GAIN INPUT SAMPLING CAPACITOR (C 1 3. 8–128 30 Increasing the gain increases the resolution of the ADC (LSB size decreases), but reduces the differential input voltage range. Calculate ...

Page 20

Low-Power, 2-Channel, Sigma-Delta ADC The MX7705 performs analog-to-digital conversions using a single-bit, 2nd-order, switched-capacitor, sigma-delta modulator. The sigma-delta modulation converts the input signal into a digital pulse train whose average duty cycle represents the digitized signal infor- mation. A ...

Page 21

External Oscillator The oscillator requires time to stabilize when enabled. Startup time for the oscillator depends on supply voltage, temperature, load capacitances, and center frequency. Depending on the load capacitance, a 1MΩ feedback resistor across the crystal can reduce the ...

Page 22

Low-Power, 2-Channel, Sigma-Delta ADC DIN RS2 RS1 RS0 COMMUNICATIONS REGISTER SETUP REGISTER (8 BITS) CLOCK REGISTER (8 BITS) DATA REGISTER (16 BITS) DOUT TEST REGISTER (8 BITS)* OFFSET REGISTER (24 BITS) GAIN REGISTER (24 BITS) *THE TEST REGISTER IS ...

Page 23

Table 6. Communications Register FIRST BIT (MSB) COMMUNICATION FUNCTION START/DATA READY Name 0/DRDY Defaults 0 Table 7. Register Selection RS2 RS1 RS0 ...

Page 24

Low-Power, 2-Channel, Sigma-Delta ADC Table 10. Operating-Mode Selection MD1 MD0 0 0 Normal Mode. Use this mode to perform normal conversions on the selected analog input channel. Self-Calibration Mode. This mode performs self-calibration on the selected channel determined from ...

Page 25

This register is reserved for factory testing of the device. For proper operation of the MX7705, do not change this register from its default power-on reset values. Offset and Gain-Calibration Registers The MX7705 contains one offset register and one gain ...

Page 26

Low-Power, 2-Channel, Sigma-Delta ADC Drive RESET low to reset the MX7705 to power-on reset status. DRDY goes high and all communication to the MX7705 is ignored while RESET is low. Upon releasing RESET, the device must be reconfigured to ...

Page 27

POLL DRDY OUTPUT 1 (DATA NOT READY) 0 (DATA READY) Figure 11. Sample Flow Diagram for Data Conversion ______________________________________________________________________________________ 16-Bit, Low-Power, 2-Channel, POWER-ON RESET INITIALIZE μC/μP SERIAL PORT WRITE TO THE COMMUNICATIONS REGISTER. SELECT CHANNEL 1 AND SET NEXT OPERATION ...

Page 28

Low-Power, 2-Channel, Sigma-Delta ADC When FSYNC = 1, the digital filter and analog modula- tor are in a reset state, inhibiting normal operation. Set FSYNC = 0 to begin calibration or conversion. When configured for normal operation (MD0 and ...

Page 29

Next, an internally generated voltage (V applied across AIN+ and AIN-. This condition results in the full-scale calibration. Start self-calibration by setting MD1 = 0, MD0 = 1, and FSYNC = 0 in the setup register. Self-calibration com- pletes in ...

Page 30

Low-Power, 2-Channel, Sigma-Delta ADC Applications Information Applications Examples Strain-Gauge Measurement Connect the differential inputs of the MX7705 to the bridge network of the strain gauge. In Figure 12, the ana- log positive supply voltage powers the bridge network and ...

Page 31

Integral Nonlinearity Integral nonlinearity (INL) is the deviation of the values on an actual transfer function from a straight line. This straight line is either a best-straight-line fit or a line drawn between the endpoints of the transfer function, once ...

Page 32

Low-Power, 2-Channel, Sigma-Delta ADC Chip Information TRANSISTOR COUNT: 42,000 PROCESS: BiCMOS 32 ______________________________________________________________________________________ Package Information For the latest package outline information and land patterns www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates ...

Page 33

... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 33 © 2010 Maxim Integrated Products ...

Related keywords