LTC2170IUKG-14#PBF Linear Technology, LTC2170IUKG-14#PBF Datasheet - Page 5
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LTC2170IUKG-14#PBF
Manufacturer Part Number
LTC2170IUKG-14#PBF
Description
IC ADC 14BIT SER/PAR 25M 52-QFN
Manufacturer
Linear Technology
Datasheet
1.LTC2172IUKG-14PBF.pdf
(34 pages)
Specifications of LTC2170IUKG-14#PBF
Number Of Bits
14
Sampling Rate (per Second)
25M
Data Interface
Serial, Parallel
Number Of Converters
4
Power Dissipation (max)
243mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
52-WFQFN Exposed Pad
Number Of Elements
4
Resolution
14Bit
Sample Rate
25MSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±0.5/±1V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
1.8V
Single Supply Voltage (min)
1.7V
Single Supply Voltage (max)
1.9V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
243mW
Differential Linearity Error
±0.8LSB
Integral Nonlinearity Error
±2.75LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
52
Package Type
QFN EP
Input Signal Type
Differential
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
DIGITAL INPUTS AND OUTPUTS
temperature range, otherwise specifi cations are at T
SYMBOL PARAMETER
ENCODE INPUTS (ENC
Differential Encode Mode (ENC
V
V
V
R
C
Single-Ended Encode Mode (ENC
V
V
V
R
C
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
V
V
I
C
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2k Pull-Up Resistor if SDO Is Used)
R
I
C
DIGITAL DATA OUTPUTS
V
V
R
IN
OH
ID
ICM
IN
IN
IH
IL
IN
IN
IH
IL
IN
OUT
OD
OS
TERM
IN
IN
OL
Differential Input Voltage
Common Mode Input Voltage
Input Voltage Range
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input Voltage Range
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
Logic Low Output Resistance to GND
Logic High Output Leakage Current
Output Capacitance
Differential Output Voltage
Common Mode Output Voltage
On-Chip Termination Resistance
+
, ENC
–
)
–
Not Tied to GND)
–
Tied to GND)
CONDITIONS
(Note 8)
Internally Set
Externally Set (Note 8)
ENC
(See Figure 10)
V
V
ENC
(See Figure 11)
V
V
V
V
SDO = 0V to 3.6V
100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
Termination Enabled, OV
DD
DD
DD
DD
IN
DD
A
= 0V to 3.6V
+
+
= 1.8V
= 1.8V
= 1.8V
= 1.8V
= 1.8V, SDO = 0V
, ENC
= 25°C. (Note 5)
to GND
–
to GND
The
l
denotes the specifi cations which apply over the full operating
DD
= 1.8V
LTC2171-14/LTC2170-14
l
l
l
l
l
l
l
l
l
l
l
l
l
l
1.125
1.125
MIN
–10
–10
247
125
0.2
1.1
0.2
1.2
1.3
0
LTC2172-14/
1.250
1.250
TYP
200
350
175
100
1.2
3.5
3.5
10
30
3
3
1.375
1.375
MAX
454
250
1.6
3.6
0.6
3.6
0.6
10
10
21721014fa
UNITS
5
mV
mV
kΩ
kΩ
μA
μA
pF
pF
pF
pF
Ω
Ω
V
V
V
V
V
V
V
V
V
V
V