LTC2442IG#PBF Linear Technology, LTC2442IG#PBF Datasheet - Page 5

• Manufacturer Part Number: LTC2442IG#PBF
• Description: IC ADC 24BIT 4CH 36-SSOP
• Manufacturer: Linear Technology

Specifications of LTC2442IG#PBF

• Number Of Bits: 24
• Sampling Rate (per Second): 8k
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 50mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

range, otherwise specifi cations are at T
SYMBOL
f
t
t
t
f
D
f
fLESCK
t
t
t
t
t
t
t
t
t
t
t
t
t
TI I G CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: V
V
V
Note 4: F
f
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defi ned as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: The converter uses the internal oscillator.
Note 8: The converter is in external SCK mode of operation such that the
SCK pin is used as a digital input. The frequency of the clock signal driving
SCK during the data output is f
EOSC
HEO
LEO
CONV
ISCK
ESCK
HESCK
DOUT_ISCK
DOUT_ESCK
1
2
3
4
KQMAX
KQMIN
5
6
7
8
EOSC
REF
IN
ISCK
= SEL
W U
= REF
= 10MHz unless otherwise specifi ed.
O
CC
+
+
pin tied to GND or to external conversion clock source with
– SEL
= 4.5V to 5.5V unless otherwise specifi ed.
– REF
–
, V
–
, V
INCM
REFCM
PARAMETER
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time
Internal SCK Frequency
Internal SCK Duty Cycle
External SCK Frequency Range
External SCK Low Period
External SCK High Period
Internal SCK 32-Bit Data Output Time
External SCK 32-Bit Data Output Time
CS ↓ to SDO Low Z
CS ↑ to SDO High Z
CS ↓ to SCK ↓
CS ↓ to SCK ↑
SCK ↓ to SDO Valid
SDO Hold After SCK ↓
SCK Setup Before CS ↓
SCK Hold After CS ↓
SDI Setup Before SCK ↑
SDI Hold After SCK ↑
= (SEL
= (REF
ESCK
+
+ SEL
+
and is expressed in Hz.
+ REF
–
)/2.
–
)/2;
A
= 25°C. (Note 3)
The
●
CONDITIONS
OSR = 256 (SDI = 0)
OSR = 32768 (SDI = 1)
External Oscillator (Notes 10, 13)
Internal Oscillator (Note 9)
External Oscillator (Notes 9, 10)
(Note 9)
(Note 8)
(Note 8)
(Note 8)
Internal Oscillator (Notes 9, 11)
External Oscillator (Notes 9, 10)
(Note 8)
(Note 12)
(Note 12)
(Note 9)
(Note 8, 12)
(Note 5)
(Note 5)
(Note 5)
denotes the specifi cations which apply over the full operating temperature
Note 9: The converter is in internal SCK mode of operation such that the
SCK pin is used as a digital output. In this mode of operation, the SCK pin
has a total equivalent load capacitance of C
Note 10: The external oscillator is connected to the F
oscillator frequency, f
Note 11: The converter uses the internal oscillator. F
Note 12: Guaranteed by design and test correlation.
Note 13: There is an internal reset that adds an additional 1µs (typ) to the
conversion time.
Note 14: In order to achieve optimum linearity, the amplifi er power
positive supply input (V
2V or greater. The negative amplifi er power supply input (V
least 200mV below the minimum input voltage level.
Note 15: Amplifi ers are externally compensated with 0.1µF.
EOSC
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
+
) must exceed the maximum input voltage level by
, is expressed in Hz.
MIN
0.99
30.9
126
0.1
0.8
25
25
45
25
25
25
15
50
10
10
0
0
40 • OSR + 170
f
EOSC
320/f
LOAD
f
32/f
EOSC
1.13
35.3
TYP
145
0.9
5
ESCK
(KHz)
EOSC
= 20pF.
/10
LTC2442
O
O
= 0V.
pin. The external
10000
10000
–
MAX
1.33
41.6
170
) must be at
20
55
20
25
25
25
50
1
UNITS
5
MHz
MHz
MHz
2442f
ms
ms
ms
Hz
ns
ns
ns
ns
µs
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
%
s
s