TC7109ACPL Microchip Technology, TC7109ACPL Datasheet - Page 11

IC ADC 12BIT HANDSHAKE 40DIP

TC7109ACPL

Manufacturer Part Number
TC7109ACPL
Description
IC ADC 12BIT HANDSHAKE 40DIP
Manufacturer
Microchip Technology
Datasheet

Specifications of TC7109ACPL

Number Of Bits
12
Data Interface
Serial, Parallel
Number Of Converters
1
Voltage Supply Source
Dual ±
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
158-1130
158-1130

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FIGURE 3-3:
3.2.4
The data outputs (bits 1 through 8, low order bytes; bits
9 through 12, polarity and over range high order bytes)
are accessible under control of the byte and chip
enable terminals as inputs, with the MODE pin at a
LOW level. These three inputs are all active LOW.
Internal pull-up resistors are provided for an inactive
HIGH level when left open. When chip enable is LOW,
a byte enable input LOW will allow the outputs of the
byte to become active. A variety of parallel data
accessing techniques may be used, as shown in the
“Interfacing” section. (See Figure 3-4 and Table 3-1.)
The access of data should be synchronized with the
conversion cycle by monitoring the Status output. This
prevents accessing data while it is being updated and
eliminates the acquisition of erroneous data.
FIGURE 3-4:
Output Timing
© 2006 Microchip Technology Inc.
CE/LOAD
High Byte
Low Byte
As Input
As Input
As Input
RUN/HOLD Input
Integrator Output
*Note:
HBEN
LBEN
Data
Data
Internal Clock
Internal Latch
Status Output
RUN/HOLD input is ignored until end of auto-zero phase.
DIRECT MODE
t
DAB
= High-Impedance
t
BEA
TC7109A RUN/HOLD Operation
TC7109A Direct Mode
Data
Valid
t
DAB
t
DAC
t
CEA
Valid
Valid
Data
Data
Determinated at
Zero Crossing
Detection
t
DHC
TABLE 3-1:
3.2.5
An alternative means of interfacing the TC7109A to
digital systems is provided when the Handshake Out-
put mode of the TC7109A becomes active in controlling
the flow of data, instead of passively responding to chip
and byte enable inputs. This mode allows a direct inter-
face between the TC7109A and industry standard
UARTs with no external logic required. The TC7109A
provides all the control and flag signals necessary to
sequence the two bytes of data into the UART and ini-
tiate their transmission in serial form when triggered
into the Handshake mode. The cost of designing
remote data acquisition stations is reduced using serial
data transmission to minimize the number of lines to
the central controlling processor.
Auto-Zero Phase I
Max 2041 Counts
Min 1790 Counts
Symbol
t
t
t
t
t
t
DAB
DHB
CEA
DAC
DHC
BEA
Byte Enable Width
Data Access Time
from Byte Enable
Data Hold Time
from Byte Enable
Chip Enable Width
Data Access Time
from Chip Enable
Data Hold Time
from Chip Enable
HANDSHAKE MODE
*
Description
TC7109A DIRECT MODE
TIMING REQUIREMENTS
Static in
Hold State
TC7109/A
7 Counts
Min
200
300
Phase II
INT
Typ
500
150
150
500
200
200
DS21456C-page 11
Max
300 nsec
300 nsec
400 nsec
400
nsec
nsec
Units
nsec

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