MCP3426A0-E/MS Microchip Technology, MCP3426A0-E/MS Datasheet - Page 20

• Manufacturer Part Number: MCP3426A0-E/MS
• Description: IC ADC 16BIT I2C PROGBL 8-MSOP
• Manufacturer: Microchip Technology

Specifications of MCP3426A0-E/MS

• Data Interface: I²C, Serial
• Number Of Bits: 16
• Sampling Rate (per Second): 15
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Resolution (bits): 16bit
• Sampling Rate: 15SPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 2.7V To 5.5V
• Supply Current: 145µA
• Digital Ic Case Style: MSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP3426/7/8
FIGURE 5-1:
5.3.2
The MCP3427 and MCP3428 have two external
device address pins (Adr1, Adr0). These pins can be
set to a logic high (or tied to V
or left floating (not connected to anything, or tied to
V
two pins allow eight possible addresses.
shows the device address depending on the logic
status of the address selection pins.
The device samples the logic status of the Adr0 and
Adr1 pins in the following events:
(a)
(b)
(c)
The device samples the logic status (address pins)
during the above events, and latches the values until a
new latch event occurs. During normal operation (after
the address pins are latched), the address pins are
internally disabled from the rest of the internal circuit.
DS22226A-page 20
DD
Note 1:
/2), These combinations of logic level using the
(See Section 5.4 “General Call”).
(See Section 5.4 “General Call”).
Device power-up.
General Call Reset
General Call Latch
Start bit
1
2:
DEVICE ADDRESS BITS (A2, A1, A0)
AND ADDRESS SELECTION PINS
(MCP3427 AND MCP3428)
Device Code
MCP3427 and MCP3428: Configured by
the user. See
configurations.
MCP3426: Programmed at the factory
during production.
1
0
Address Byte:
Address
Address Byte
Address Byte.
1
Table 5-4
A2
Address Bits
DD
Read/Write bit
), low (or tied to V
A1
Acknowledge bit
for address bit
A0
(Note 1)
R/W ACK
Table 5-3
SS
),
It is recommended to issue a General Call Reset or
General Call Latch command once after the device
has powered up. This will ensure that the device reads
the address pins in a stable condition, and avoid
latching the address bits while the power supply is
ramping up. This might cause inaccurate address pin
detection.
When the address pin is left “floating”:
When the address pin is left “floating”, the address pin
momentarily outputs a short pulse with an amplitude of
about V
latches this pin voltage at the same time.
If the “floating” pin is connected to a large parasitic
capacitance (> 20 pF) or to a long PCB trace, this short
floating voltage output can be altered. As a result, the
device may not latch the pin correctly.
It is strongly recommended to keep the “floating” pin
pad as short as possible in the customer application
PCB and minimize the parasitic capacitance to the pin
as small as possible (< 20 pF).
Figure 5-2
output at the address pin when the address pin is left
“floating”. The waveform at the Adr0 pin is captured by
using an oscilloscope probe with 15 pF of capacitance.
The device latches the floating condition immediately
after the General Call Latch command.
FIGURE 5-2:
Command and Voltage Output at Address Pin
Left “Floating” (MCP3427 and MCP3428).
Float waveform (output)
at address pin
SDA
SCL
DD
/2 during the latch event. The device also
shows an example of the Latch voltage
General Call Latch
© 2009 Microchip Technology Inc.