MAX11046ETN+ Maxim Integrated Products, MAX11046ETN+ Datasheet - Page 12
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MAX11046ETN+
Manufacturer Part Number
MAX11046ETN+
Description
ADC 16BIT SAMPLING 8CH 56-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX11044ETN.pdf
(27 pages)
Specifications of MAX11046ETN+
Number Of Bits
16
Sampling Rate (per Second)
250k
Data Interface
Parallel
Number Of Converters
8
Power Dissipation (max)
2.22W
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-WQFN Exposed Pad, 56-HWQFN
Number Of Adc Inputs
8
Architecture
SAR
Conversion Rate
250 KSPs
Resolution
16 bit
Input Type
Voltage
Interface Type
Parallel
Snr
92.3 dB
Voltage Reference
Internal 4.096 V
Supply Voltage (max)
5.25 V
Supply Voltage (min)
2.7 V, 4.75 V
Maximum Power Dissipation
2222 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Input Voltage
5 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
12
23, 28, 32, 38,
24, 29, 35, 46,
25, 30, 36, 45,
43, 49, 53, 58
MAX11044
(TQFP-EP)
8, 22, 59
9, 21, 60
______________________________________________________________________________________
52, 57
51, 56
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
23, 28, 32, 38,
24, 29, 35, 46,
25, 30, 36, 45,
43, 49, 53, 58
MAX11045
(TQFP-EP)
8, 22, 59
9, 21, 60
52, 57
51, 56
PIN
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
23, 28, 32, 38,
24, 29, 35, 46,
25, 30, 36, 45,
43, 49, 53, 58
MAX11046
(TQFP-EP)
8, 22, 59
9, 21, 60
52, 57
51, 56
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
DB3/CR3
DB2/CR2
DB1/CR1
DB0/CR0
CONVST
AGNDS
NAME
DGND
AGND
DVDD
SHDN
AVDD
DB14
DB13
DB12
DB11
DB10
EOC
DB9
DB8
DB7
DB6
DB5
DB4
16-Bit Parallel Data Bus Digital Output Bit 14
16-Bit Parallel Data Bus Digital Output Bit 13
16-Bit Parallel Data Bus Digital Output Bit 12
16-Bit Parallel Data Bus Digital Output Bit 11
16-Bit Parallel Data Bus Digital Output Bit 10
16-Bit Parallel Data Bus Digital Output Bit 9
16-Bit Parallel Data Bus Digital Output Bit 8
Digital Ground
Digital Supply. Bypass to DGND with a 0.1µF capacitor
at each DVDD input.
16-Bit Parallel Data Bus Digital Output Bit 7
16-Bit Parallel Data Bus Digital Output Bit 6
16-Bit Parallel Data Bus Digital Output Bit 5
16-Bit Parallel Data Bus Digital Output Bit 4
16-Bit Parallel Data Bus Digital Output Bit 3/
Configuration Register Input Bit 3
16-Bit Parallel Data Bus Digital Output Bit 2/
Configuration Register Input Bit 2
16-Bit Parallel Data Bus Digital Output Bit 1/
Configuration Register Input Bit 1
16-Bit Parallel Data Bus Digital Output Bit 0/
Configuration Register Input Bit 0
Active-Low End-of-Conversion Output. EOC goes low
when conversion is completed. EOC goes high when a
conversion is initiated.
C onver t S tar t Inp ut. Ri si ng ed g e of C ON V S T end s
sam p l e and star ts a conver si on on the cap tur ed sam p l e.
The AD C i s i n acq ui si ti on m od e w hen C ON V S T i s l ow
and C ON V S T m od e = 0.
Shutdown Input. If SHDN is held high, the entire device
will enter and stay in a low-current state. Contents of
the configuration register are not lost when in the
shutdown mode.
Signal Ground. Connect all AGND and AGNDS inputs
together on PCB.
Analog Supply Input. Bypass AVDD to AGND with a
0.1µF capacitor at each AVDD input.
Analog Ground. Connect all AGND inputs together.
Pin Description (continued)
FUNCTION