MAX1183ECM+D Maxim Integrated Products, MAX1183ECM+D Datasheet - Page 9

IC ADC 10BIT 40MSPS DUAL 48-TQFP

MAX1183ECM+D

Manufacturer Part Number
MAX1183ECM+D
Description
IC ADC 10BIT 40MSPS DUAL 48-TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1183ECM+D

Number Of Bits
10
Sampling Rate (per Second)
40M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
180mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Conversion Rate
40 MSPs
Resolution
10 bit
Snr
59.6 dB
Voltage Reference
2.048 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Power Dissipation
2430 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Input Voltage
3 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2, 6, 11,
3, 7, 10,
14, 15
13, 16
31, 34
32, 33
PIN
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
12
17
18
19
20
21
22
23
24
25
26
27
28
29
30
35
36
37
38
39
40
1
4
5
8
9
SLEEP
OGND
NAME
OV DD
COM
INA+
INB+
GND
INA-
INB-
CLK
D9B
D8B
D7B
D6B
D5B
D4B
D3B
D2B
D1B
D0B
D0A
D1A
D2A
D3A
D4A
D5A
V
T/B
PD
OE
DD
_______________________________________________________________________________________
Internal Reference and Parallel Outputs
Common-Mode Voltage Input/Output. Bypass to GND with a ≥ 0.1µF capacitor.
Analog Supply Voltage. Bypass each supply pin to GND with a 0.1µF capacitor.
The analog supply accepts an input range of 2.7V to 3.6V.
Analog Ground
Channel A Positive Analog Input. For single-ended operation connect signal source to INA+.
Channel A Negative Analog Input. For single-ended operation connect INA- to COM.
Channel B Negative Analog Input. For single-ended operation connect INB- to COM.
Channel B Positive Analog Input. For single-ended operation connect signal source to INB+.
Converter Clock Input
T/B selects the ADC digital output format.
High: Two’s complement.
Low: Straight offset binary.
Sleep Mode Input.
High: Deactivates the two ADCs, but leaves the reference bias circuit active.
Low: Normal operation.
Power-Down Input.
High: Power-down mode.
Low: Normal operation.
Output Enable Input.
High: Digital outputs disabled.
Low: Digital outputs enabled.
Three-State Digital Output, Bit 9 (MSB), Channel B
Three-State Digital Output, Bit 8, Channel B
Three-State Digital Output, Bit 7, Channel B
Three-State Digital Output, Bit 6, Channel B
Three-State Digital Output, Bit 5, Channel B
Three-State Digital Output, Bit 4, Channel B
Three-State Digital Output, Bit 3, Channel B
Three-State Digital Output, Bit 2, Channel B
Three-State Digital Output, Bit 1, Channel B
Three-State Digital Output, Bit 0 (LSB), Channel B
Output Driver Ground
Output Driver Supply Voltage. Bypass each supply pin to OGND with a 0.1µF capacitor.
The output driver supply accepts an input range of 1.7V to 3.6V.
Three-State Digital Output, Bit 0 (LSB), Channel A
Three-State Digital Output, Bit 1, Channel A
Three-State Digital Output, Bit 2, Channel A
Three-State Digital Output, Bit 3, Channel A
Three-State Digital Output, Bit 4, Channel A
Three-State Digital Output, Bit 5, Channel A
FUNCTION
Pin Description
9

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