MAX1281BEUP+ Maxim Integrated Products, MAX1281BEUP+ Datasheet - Page 12
![IC ADC 12BIT 300KSPS 20-TSSOP](/photos/6/52/65243/175-20-tssop_sml.jpg)
MAX1281BEUP+
Manufacturer Part Number
MAX1281BEUP+
Description
IC ADC 12BIT 300KSPS 20-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX1281BCUP.pdf
(24 pages)
Specifications of MAX1281BEUP+
Number Of Bits
12
Sampling Rate (per Second)
300k
Data Interface
MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
559mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Number Of Adc Inputs
8
Architecture
SAR
Conversion Rate
300 KSPs
Resolution
12 bit
Interface Type
Serial
Voltage Reference
Internal 2.5 V or External
Supply Voltage (max)
3.3 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The T/H enters its tracking mode on the falling clock
edge after the fifth bit of the 8-bit control word has been
shifted in. It enters its hold mode on the falling clock
edge after the eighth bit of the control word has been
shifted in. If the converter is set up for single-ended
inputs, IN- is connected to COM and the converter con-
verts the “+” input. If the converter is set up for differen-
tial inputs, the difference of [(IN+) - (IN-)] is converted.
At the end of the conversion, the positive input con-
nects back to IN+ and C
nal.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time,
t
the signal and is also the minimum time needed for the
signal to be acquired. It is calculated by the following
equation:
where R
input signal; t
or 625ns (MAX1281). Note that source impedances
below 2kΩ do not significantly affect the ADC’s AC per-
formance.
Serial 12-Bit ADCs with Internal Reference
Figure 5. Quick-Look Circuit
12
ACQ
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel,
ANALOG
, is the maximum time the device takes to acquire
______________________________________________________________________________________
2.500V
INPUT
0V TO
IN
0.01μF
= 800Ω, R
0.01μF
t
ACQ
ACQ
4.7μF
= 9
is never less than 468ns (MAX1280)
2.5V
S
✕
REF
CH7
REFADJ
= the source impedance of the
(R
HOLD
S
MAX1280
MAX1281
+ R
charges to the input sig-
IN
)
✕
SSTRB
SHDN
SCLK
DOUT
V
V
COM
GND
12pF
DD1
DD2
DIN
CS
Track/Hold
TO V
0.1μF
DD2
TO V
DD2
*FULL-SCALE ANALOG INPUT, CONVERSION RESULT = $FFF (HEX)
10μF
The ADC’s input tracking circuitry has a 6MHz
(MAX1280) or 3MHz (MAX1281) small-signal band-
width, so it is possible to digitize high-speed transient
events and measure periodic signals with bandwidths
exceeding the ADC’s sampling rate by using under-
sampling techniques. To avoid high-frequency signals
being aliased into the frequency band of interest, anti-
alias filtering is recommended.
Internal protection diodes, which clamp the analog
input to V
swing from GND - 0.3V to V
age. However, for accurate conversions near full scale,
the inputs must not exceed V
be lower than GND by 50mV.
If the analog input exceeds 50mV beyond the sup-
plies, do not allow the input current to exceed 2mA.
To quickly evaluate the MAX1280/MAX1281’s analog
performance, use the circuit of Figure 5. The MAX1280/
MAX1281 require a control byte to be written to DIN
before each conversion. Connecting DIN to V
in control bytes of $FF (HEX), which trigger single-
ended unipolar conversions on CH7 without powering
down between conversions. The SSTRB output pulses
EXTERNAL CLOCK
+3V or +5V
DD1
and GND, allow the channel input pins to
CH1
OSCILLOSCOPE
CH2
Analog Input Protection
DD1
DD1
CH3
by more than 50mV or
Input Bandwidth
+ 0.3V without dam-
CH4
Quick Look
SCLK
SSTRB
DOUT*
DD2
feeds