KAD2708C-10Q68 Intersil, KAD2708C-10Q68 Datasheet - Page 2

IC ADC 8BIT 105MSPS SGL 68-QFN

KAD2708C-10Q68

Manufacturer Part Number
KAD2708C-10Q68
Description
IC ADC 8BIT 105MSPS SGL 68-QFN
Manufacturer
Intersil
Series
FemtoCharge™r
Datasheet

Specifications of KAD2708C-10Q68

Number Of Bits
8
Sampling Rate (per Second)
105M
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
185mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
For Use With
KDC2708CEVAL - DAUGHTER CARD FOR KAD2708
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table of Contents
Absolute Maximum Ratings ........................................ 3
Thermal Information ..................................................... 3
Electrical Specifications .............................................. 3
Digital Specifications ................................................... 4
Timing Diagram ............................................................ 6
Timing Specifications .................................................. 6
ESD ................................................................................ 6
Pin Descriptions ........................................................... 7
Pin Configuration ......................................................... 8
Typical Performance Curves ....................................... 9
Functional Description ................................................ 12
Equivalent Circuits ....................................................... 14
Layout Considerations ................................................ 15
Definitions ..................................................................... 15
Package Outline Drawing ............................................ 16
Reset ......................................................................... . 12
Voltage Reference ..................................................... . 12
Analog Input .............................................................. . 12
Clock Input ................................................................. . 13
Jitter ........................................................................... . 13
Digital Outputs ........................................................... . 14
Split Ground and Power Planes ................................ . 15
Clock Input Considerations ........................................ . 15
Bypass and Filtering .................................................. . 15
LVCMOS Outputs ...................................................... . 15
Unused Inputs ........................................................... . 15
2
KAD2708C
April 14, 2011
FN6812.1

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