AD9245BCPZ-80 Analog Devices Inc, AD9245BCPZ-80 Datasheet - Page 8
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AD9245BCPZ-80
Manufacturer Part Number
AD9245BCPZ-80
Description
IC ADC 14BIT 80MSPS 3V 32-LFCSP
Manufacturer
Analog Devices Inc
Datasheet
1.AD9245BCPZ-80.pdf
(32 pages)
Specifications of AD9245BCPZ-80
Data Interface
Parallel
Number Of Bits
14
Sampling Rate (per Second)
80M
Number Of Converters
3
Power Dissipation (max)
414mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, CSP Exposed Pad
Resolution (bits)
14bit
Sampling Rate
80MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Analog
2.7V To 3.6V
Supply Current
122mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9245BCP-80EBZ - BOARD EVAL FOR AD9245BCP-80AD9245BCP-40EBZ - BOARD EVAL FOR AD9245BCP-40AD9245BCP-20EBZ - BOARD EVAL FOR AD9245BCP-20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9245BCPZ-80
Manufacturer:
AD
Quantity:
197
Company:
Part Number:
AD9245BCPZ-80
Manufacturer:
ADI
Quantity:
1
Part Number:
AD9245BCPZ-80
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9245
SWITCHING SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, unless otherwise noted.
Table 6.
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS
OUT-OF-RANGE RECOVERY TIME
1
2
3
For the AD9245BCP-65 and AD9245BCP-80 models only, with duty cycle stabilizer enabled. DCS function not applicable for AD9245BCP-20 and AD9245BCP-40
models.
Output delay is measured from CLK 50% transition to DATA 50% transition, with 5 pF load on each output.
Wake-up time is dependent on value of decoupling capacitors; typical values shown with 0.1 μF and 10 μF capacitors on REFT and REFB.
Maximum Conversion Rate
Minimum Conversion Rate
CLK Period
CLK Pulse Width High
CLK Pulse Width Low
Output Delay
Pipeline Delay (Latency)
Aperture Delay (t
Aperture Uncertainty Jitter (t
Wake-Up Time
2
3
(t
PD
A
ANALOG
)
)
INPUT
DATA
1
1
CLK
OUT
J
)
N–9
N–1
Min
20
50.0
15.0
15.0
AD9245BCP-20
N–8
Typ
3.5
7
1.0
0.5
3.0
1
N
N–7
t
A
N+1
Max
1
Figure 2. Timing Diagram
N–6
N+2
Rev. D | Page 8 of 32
Min
40
25.0
8.8
8.8
AD9245BCP-40
N–5
N+3
Typ
3.5
7
1.0
0.5
3.0
1
N–4
Max
1
N+4
N–3
t
PD
Min
65
15.4
6.2
6.2
N+5
AD9245BCP-65
= 6.0ns MAX
2.0ns MIN
N–2
Typ
3.5
7
1.0
0.5
3.0
2
N+6
N–1
Max
1
N+7
12.5
4.6
4.6
Min
80
N
N+8
AD9245BCP-80
Typ
4.2
7
1.0
0.3
7.0
2
Max
1
Unit
MSPS
MSPS
ns
ns
ns
ns
Cycles
ns
ps rms
ms
Cycles