CS5341-CZZ Cirrus Logic Inc, CS5341-CZZ Datasheet

IC ADC AUD 105DB 200KHZ 16-TSSOP

CS5341-CZZ

Manufacturer Part Number
CS5341-CZZ
Description
IC ADC AUD 105DB 200KHZ 16-TSSOP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5341-CZZ

Package / Case
16-TSSOP
Number Of Converters
2
Number Of Bits
24
Sampling Rate (per Second)
200k
Data Interface
Serial
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Conversion Rate
192 KSPS
Resolution
24 bit
Number Of Adc Inputs
2
Operating Supply Voltage
3.3 V or 5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 10 C
Mounting Style
SMD/SMT
Power Consumption
90 mW
Supply Voltage (max)
5.25 V
Supply Voltage (min)
3.1 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1545 - BOARD EVAL FOR CS5341 STEREO ADC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1082-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5341-CZZ
Manufacturer:
CIRRUS
Quantity:
78
Part Number:
CS5341-CZZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
CS5341-CZZR
0
Features
Single-Ended
Single-Ended
Analog Input
Analog Input
Advanced Multi-bit Delta-Sigma Architecture
24-bit Conversion
Supports All Audio Sample Rates Including
192 kHz
105 dB Dynamic Range at 5 V
-98 dB THD+N
90 mW Power Consumption
High-Pass Filter to Remove DC Offsets
Analog/Digital Core Supplies from 3.3 V to 5 V
Supports Logic Levels between 1.8 V and 5 V
Auto-Detect Mode Selection in Slave Mode
Auto-Detect MCLK Divider
http://www.cirrus.com
105 dB, 192 kHz, Multi-Bit Audio A/D Converter
AINR
AINL
FILT+
VQ
3.3 V to 5 V
Switch-Cap
ADC
Switch-Cap
ADC
Reference
Voltages
VA
Internal
High-Pass
High-Pass
Filter
Filter
Copyright © Cirrus Logic, Inc. 2008
3.3 V to 5 V
VD
(All Rights Reserved)
Confidential Draft
Digital Filters
Low-Latency
Digital Filters
Low-Latency
General Description
The CS5341 is a complete analog-to-digital converter
for digital audio systems. It performs sampling, analog-
to-digital conversion, and anti-alias filtering, generating
24-bit values for both left and right inputs in serial form
at sample rates up to 200 kHz per channel.
The CS5341 uses a 5th-order, multi-bit Delta-Sigma
modulator followed by digital filtering and decimation,
which removes the need for an external anti-alias filter.
The CS5341 is available in a 16-pin TSSOP package
for Commercial (-10° to +70° C) and Automotive grades
(-40° to +85° C). The CDB5341 Customer Demonstra-
tion Board is also available for device evaluation and
implementation suggestions. Please refer to
Information”
information.
The CS5341 is ideal for audio systems requiring wide
dynamic range, negligible distortion and low noise, such
as set-top boxes, DVD-karaoke players, DVD record-
ers, A/V receivers, and automotive applications.
3/11/08
on
page 22
1.8 V to 5 V
VL
MCLK Divider
Auto-detect
Slave Mode
Auto-detect
for
CS5341
M0
M1
complete
Mode
Configuration
Master Clock
Reset
SDOUT
March '08
SCLK
LRCK
“Ordering
DS564F2
ordering

Related parts for CS5341-CZZ

CS5341-CZZ Summary of contents

Page 1

... Board is also available for device evaluation and implementation suggestions. Please refer to Information” information. The CS5341 is ideal for audio systems requiring wide dynamic range, negligible distortion and low noise, such as set-top boxes, DVD-karaoke players, DVD record- ers, A/V receivers, and automotive applications. ...

Page 2

... Power-Up Sequence ...................................................................................................................... 18 4.5 Analog Connections ....................................................................................................................... 18 4.6 Grounding and Power Supply Decoupling ...................................................................................... 18 4.7 Synchronization of Multiple Devices ............................................................................................... 18 4.8 Capacitor Size on the Reference Pin (FILT+) ................................................................................ 19 5. PARAMETER DEFINITIONS ................................................................................................................ 20 6. PACKAGE DIMENSIONS ................................................................................................................... 21 THERMAL CHARACTERISTICS .......................................................................................................... 21 7. ORDERING INFORMATION ................................................................................................................ 22 8. REVISION HISTORY ............................................................................................................................ 22 2 Confidential Draft 3/11/08 CS5341 DS564F2 ...

Page 3

... Figure 17.Typical Connection Diagram ..................................................................................................... 14 Figure 18.CS5341 Master Mode Clocking ................................................................................................ 16 Figure 19.I²S Serial Audio Interface .......................................................................................................... 17 Figure 20.Left-Justified Serial Audio Interface .......................................................................................... 17 Figure 21.CS5341 Recommended Analog Input Buffer ............................................................................ 18 Figure 22.CS5341 THD+N versus Frequency .......................................................................................... 19 LIST OF TABLES Table 1. Speed Modes and the Associated Output Sample Rates (Fs) .................................................... 15 Table 2 ...

Page 4

... Logic VL 1.7 Commercial T -10 AC Automotive T -40 AC (Note 2) Symbol Analog VA Logic VL Digital VD (Note (Note 4) V GND-0.7 IN (Note 4) V IND stg CS5341 Typ Max Unit (Note 1) 5.25 V 3.3 5.25 V 3.3 5. ° °C Min Max Units -0.3 +6.0 V -0.3 +6.0 V -0.3 +6.0 V +10 -10 mA VA+0 ...

Page 5

... Symbol Min Typ A-weighted 99 105 unweighted 96 102 - 99 (Note 5) THD -98 - -82 - - Symbol Min Typ A-weighted 99 105 unweighted 96 102 - 99 (Note 5) THD -98 - -82 - - Min - - -5 - 0.53*VA - CS5341 VA = 3.3 V Max Min Typ Max Unit - 96 102 - -92 - - Max Min Typ Max Unit - 96 102 - -92 - - ...

Page 6

... Symbol Min Typ A-weighted 97 105 unweighted 94 102 - 99 (Note 6) THD -98 - -82 - - Symbol Min Typ A-weighted 97 105 unweighted 94 102 - 99 (Note 6) THD -98 - -82 - - Min - - -10 - 0.50*VA - CS5341 VA = 3.3 V Max Min Typ Max Unit - 94 102 - -90 - - Max Min Typ Max Unit - 94 102 - -90 - - ...

Page 7

... Hz Passband Ripple 7. Filter characteristics scale precisely with Fs 8. Response shown is for Fs equal to 48 kHz. Filter characteristics scale with Fs. DS564F2 Confidential Draft 3/11/08 Symbol (Note 7) (Note (Note 7) (Note (Note 7) (Note (Note 8) (Note 8) CS5341 Min Typ Max Unit 0 - 0.4895 Fs -0.035 - 0.035 dB 0.5687 - - ...

Page 8

... Figure 6. Double-Speed Mode Stopband Rejection CS5341 0.46 0.48 0.50 0.52 0.54 0.56 0.58 Frequency (norm alized to Fs) 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Frequency (norm alized to Fs) 0 ...

Page 9

... Figure 12. Quad-Speed Mode Passband Ripple CS5341 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 Frequency (norm alized to Fs) Frequency (norm alized to Fs) Frequency (norm alized to Fs) ...

Page 10

... Symbol Min Positive Analog VA Positive Digital VD Positive Logic 3 VL, VL, VL,VD VL, VD VL (Power-Down Mode) PSRR (Note 10) Symbol Min (% of VL -10 in CS5341 Typ Max Unit 3.1 - 5.25 V 3.1 - 5.25 V 1 18 180 220 107 9 ...

Page 11

... Symbol Min t 39 clkw -20 Single-Speed mslr -20 Double-Speed -8 Quad-Speed t - sdo Single-Speed - - Double-Speed - Quad-Speed 40 t 156 sclkw stp t 5 hld t -20 slrd 40 t 156 sclkw stp t 5 hld t -20 slrd sclkw 29 stp t 5 hld t -8 slrd Table on page CS5341 Typ Max Unit - 1953 ...

Page 12

... Figure 15. Master Mode, I²S SAI 12 Confidential Draft 3/11/08 LRCK input SCLK input MSB MSB-1 SDOUT Figure 14. Slave Mode, Left-Justified SAI LRCK input SCLK input t sdo MSB SDOUT CS5341 t sclkw t slrd t stp t hld MSB t sclkw t slrd Figure 16. Slave Mode, I²S SAI DS564F2 MSB-1 t stp t hld MSB ...

Page 13

... VQ 11 reference voltage Analog Power (Input) - Positive power supply for the analog section. Positive Voltage Reference (Output) - Positive reference voltage for the internal FILT+ 15 sampling circuits. DS564F2 Confidential Draft 3/11/ MCLK FILT REF_GND SDOUT GND AINR SCLK AINL LRCK RST CS5341 13 ...

Page 14

... F ** Ω 0.1 µ RST M0 M1 CS5341 A/D CONVERTER SDOUT MCLK LRCK SCLK GND CS5341 1 µ F Power Down and Mode Settings VL or GND * Ω 10k Audio Data Processor Timing Logic and Clock 2 * Pull- for I S *** Capacitor value affects Pull-down to GND for LJ ...

Page 15

... APPLICATIONS 4.1 Single-, Double-, and Quad-Speed Modes The CS5341 can support output sample rates from 2 kHz to 200 kHz. The proper speed mode can be de- termined by the desired output sample rate and the external MCLK/LRCK ratio, as shown in Speed Mode Single-Speed Mode Double-Speed Mode Quad-Speed Mode * Quad-Speed Mode, 64x only available in Master Mode ...

Page 16

... Fs to maximize system performance. A unique feature of the CS5341 is the automatic selection of either Single-, Double- or Quad-Speed Mode when operating as a clock slave. The auto-mode select feature negates the need to configure the Mode pins to correspond to the desired mode ...

Page 17

... Master Clock The CS5341 requires a Master clock (MCLK) which runs the internal sampling circuits and digital filters. There is also an internal MCLK divider which is automatically activated based on the speed mode and frequency of the MCLK. Table 4 lists some common audio output sample rates and the required MCLK frequency. Please note that not all of the listed sample rates are supported when operating with a fast MCLK (512x, 256x, 128x for Single-, Double-, and Quad-Speed Modes, respectively) ...

Page 18

... LRCK signals are the same for all of the CS5341’s in the system. If only one master clock source is needed, one solution is to place one CS5341 in Master Mode, and slave all of the other CS5341’s to the one master. If multiple master clock sources are needed, a possible solution would be to supply all clocks from the same external source and time the CS5341 reset with the inactive (falling) edge of MCLK ...

Page 19

... Capacitor Size on the Reference Pin (FILT+) The CS5341 requires an external capacitance on the internal reference voltage pin, FILT+. The size of this decoupling capacitor will affect the low frequency distortion performance as shown in capacitor values used to optimize low frequency distortion performance. This plot was taken using the CDB5341 evaluation platform, with the device running in Single-Speed Mode and VA=VD=VL=5 V ...

Page 20

... The deviation from the nominal full-scale analog input for a full-scale digital output. Gain Drift The change in gain value with temperature. Units in ppm/°C. Offset Error The deviation of the mid-scale transition (111...111 to 000...000) from the ideal. Units in mV. 20 Confidential Draft 3/11/08 CS5341 DS564F2 ...

Page 21

... JEDEC #: MO-153 Controlling Dimension is Millimeters Symbol θ CS5341 1 E1 END VIEW L MILLIMETERS NOM MAX -- 1.10 -- 0.15 0.90 0.95 0.245 0.30 5.00 5.10 6.40 6.50 4.40 4.50 ...

Page 22

... Confidential Draft 3/11/08 Package Pb-Free Grade 16-TSSOP YES Commercial -10° to +70° C 16-TSSOP YES Automotive -40° to +85° Changes www.cirrus.com. CS5341 Temp Range Container Order # Bulk CS5341-CZZ Tape & Reel CS5341-CZZR Bulk CS5341-DZZ Tape & Reel CS5341-DZZR - - CDB5341 Table 1 on page 15 DS564F2 ...

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