AD7798BRUZ Analog Devices Inc, AD7798BRUZ Datasheet - Page 16

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AD7798BRUZ

Manufacturer Part Number
AD7798BRUZ
Description
IC ADC 16BIT SIG-DEL 3CH 16TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7798BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
16
Sampling Rate (per Second)
470
Number Of Converters
1
Power Dissipation (max)
2mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
16bit
Sampling Rate
470SPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Voltage Range - Digital
2.7V To 5.25V
Number Of Elements
1
Resolution
16Bit
Architecture
Delta-Sigma
Sample Rate
0.47KSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±2.5V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
2mW
Integral Nonlinearity Error
±15ppm of FSR
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Input Signal Type
Differential
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7798EB - BOARD EVALUATION FOR AD7798
Lead Free Status / Rohs Status
Compliant

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AD7798/AD7799
CONFIGURATION REGISTER
RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x0710
The configuration register is a 16-bit register from which data can be read or to which data can be written. This register is used to
configure the ADC for unipolar or bipolar mode, to enable or disable the buffer, to enable or disable the burnout currents, to select the
gain, and to select the analog input channel. Table 15 outlines the bit designations for the filter register. CON0 through CON15 indicate
the bit locations, with CON denoting that the bits are in the configuration register. CON15 denotes the first bit of the data stream. The
number in parentheses indicates the power-on/reset default status of the bit.
CON15
0(0)
CON7
0(0)
Table 15. Configuration Register Bit Designations
Bit Location
CON15 to CON14
CON13
CON12
CON11
CON10 to CON8
CON7 to CON6
CON5
CON4
CON3
CON2 to CON0
CON14
0(0)
CON6
0(0)
Bit Name
0
BO
U/B
0
G2 to G0
0
REF_DET
BUF
0
CH2 to CH0
CON13
BO(0)
CON5
REF_DET(0)
Description
These bits must be programmed with a Logic 0 for correct operation.
Burnout Current Enable Bit. When this bit is set to 1 by the user, the 100 nA current sources in the signal path
are enabled. When BO = 0, the burnout currents are disabled. The burnout currents can be enabled only when
the buffer or in-amp is active.
Unipolar/Bipolar Bit. Set by the user to enable unipolar coding, that is, zero differential input results in
0x000000 output, and a full-scale differential input results in 0xFFFFFF output. Cleared by the user to enable
bipolar coding. Negative full-scale differential input results in an output code of 0x000000, zero differential
input results in an output code of 0x800000, and a positive full-scale differential input results in an output
code of 0xFFFFFF.
This bit must be programmed with a Logic 0 for correct operation.
Gain Select Bits. Written to by the user to select the ADC input range as follows:
Enables the reference detect function. When REF_DET is set, the NOREF bit in the status register indicates
when the external reference being used by the ADC is open circuit or less than 0.5 V. When cleared, the
reference detect function is disabled.
Configures the ADC for buffered or unbuffered modes. If BUF is cleared, the ADC operates in unbuffered
mode, lowering the power consumption of the device. If BUF is set, the ADC operates in buffered mode,
allowing the user to place source impedances on the front end without contributing gain errors to the system.
The buffer can be disabled when the gain equals 1 or 2. For higher gains, the buffer is automatically enabled.
With the buffer disabled, the voltage on the analog input pins can range from 30 mV below GND to 30 mV
above AV
must be limited to 100 mV within the power supply rails.
This bit must be programmed with a Logic 0 for correct operation.
Channel Select Bits. Written to by the user to select the active analog input channel to the ADC as follows:
CH2
0
0
0
0
1
1
1
1
G2
0
0
0
0
1
1
1
1
These bits must be programmed with a Logic 0 for correct operation.
DD
. When the buffer is enabled, it requires some headroom; therefore, the voltage on any input pin
CH1
0
0
1
1
0
0
1
1
G1
0
0
1
1
0
0
1
1
CON12
U/B (0)
CON4
BUF(1)
G0
0
1
0
1
0
1
0
1
CH0
0
1
0
1
0
1
0
1
Rev. A | Page 16 of 28
Gain
1 (in-amp not used)
2 (in-amp not used)
4
8
16
32
64
128
Channel
AIN1(+) – AIN1(–)
AIN2(+) – AIN2(–)
AIN3(+) – AIN3(–)
AIN1(–) – AIN1(–)
Reserved
Reserved
Reserved
AV
DD
monitor
CON11
0(0)
CON3
0(0)
CON10
G2(1)
CON2
CH2(0)
Calibration Pair
0
1
2
0
Automatically selects gain = 1/6 and internal
reference = 1.17 V
ADC Input Range (2.5 V Reference)
2.5 V
1.25 V
625 mV
312.5 mV
156.2 mV
78.125 mV
39.06 mV
19.53 mV
CON9
CON1
CH1(0)
G1(1)
CON8
G0(1)
CON0
CH0(0)

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