AD73322LAST Analog Devices Inc, AD73322LAST Datasheet - Page 39

IC ANALOG FRONT END DUAL 44-LQFP

AD73322LAST

Manufacturer Part Number
AD73322LAST
Description
IC ANALOG FRONT END DUAL 44-LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD73322LAST

Rohs Status
RoHS non-compliant
Number Of Bits
16
Number Of Channels
4
Power (watts)
73mW
Voltage - Supply, Analog
2.7 V ~ 5.5 V
Voltage - Supply, Digital
2.7 V ~ 5.5 V
Package / Case
44-LQFP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD73322LAST
Manufacturer:
ADI
Quantity:
202
Part Number:
AD73322LAST
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD73322LASTREEL
Manufacturer:
ANALOGDEVICES
Quantity:
4 817
At each occurrence of an SDOFS pulse, the DSP’s transmit
buffer contents are sent to the SDI pin of the AD73322L. This
also causes a subsequent DSP Tx interrupt which transfers the
initialization word, pointed to by the circular buffer pointer, to
the Tx buffer. The buffer pointer is updated to point to the next
unsent initialization word. When the circular buffer pointer
wraps around, which happens after the last word has been
accessed, it indicates that the initialization phase is complete.
This can be done manually in the DSP using a simple address
check, or autobuffered mode can be used to complete the
transfer automatically.
In the main body of the program the code loops, waiting for the
initialization sequence to be completed.
txcdat: ar = dm(stat_flag);
check_init:
ar = pass ar;
if eq rti;
ena sec_reg;
ax0 = dm (i3, m1);
tx0 = ax0;
ax0 = i3;
ay0 = ^init_cmds;
ar = ax0 - ay0;
if gt rti;
ax0 = 0x00;
dm (stat_flag) = ax0;
rti;
ax0 = dm (stat_flag);
af = pass ax0;
if ne jump check_init;
Rev. A | Page 39 of 48
Because the AD73322L is effectively a cascade of two codec
units, it is important to observe the following restrictions in the
sequence of sending initialization words to the two codecs. It is
preferable to send pairs of control words for the corresponding
control registers in each codec, and it is essential to send the
control word for codec 2 before that for codec 1. Control
Registers A and B contain settings, such as sampling rate, serial
clock rate, etc., which critically require synchronous update in
both codecs.
Once the device has been initialized, Control Register A on
both codecs is written with a control word which changes the
operating mode from program mode to either data mode or
mixed control data mode. The device count field, which
defaults to 000b, must be programmed to 001b for a single
AD73322L device. In data mode or mixed mode, the main
function of the device is to return ADC samples from both
codecs and to accept DAC words for both codecs. During each
sample interval, two ADC samples are returned from the
device, while in the same interval two DAC update samples are
sent to the device. To reduce the number of interrupts and to
reduce complexity, autobuffering can be used to ensure that
only one interrupt is generated during each sampling interval.
AD73322L

Related parts for AD73322LAST