MAXQ3183-RAN+ Maxim Integrated Products, MAXQ3183-RAN+ Datasheet - Page 18

• Manufacturer Part Number: MAXQ3183-RAN+
• Description: IC AFE POLYPHASE MULTI 28TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAXQ3183-RAN+

• Number Of Channels: 8
• Power (watts): 140mW
• Voltage - Supply, Analog: 3.6V
• Voltage - Supply, Digital: 3.6V
• Package / Case: 28-TSSOP
• For Use With: MAXQ3183-KIT - KIT EV REFRNC DSIGN FOR MAXQ3183
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Bits: -
• Other names: 90-M3183+RAN

Low-Power, Multifunction, Polyphase AFE
with Harmonics and Tamper Detect
same manner as if an external reset had taken place.
Unlike a hardware reset, however, a software reset does
not cause the MAXQ3183 to drive the RESET line low.
In addition to the hardware reset provided by the
power-on reset and brownout reset circuits, the
MAXQ3183 includes the capability to detect a low
power supply on the DVDD pin and alert the master
through the interrupt (IRQ) mechanism before a hard-
ware reset occurs. This function, which is always
enabled outside of Stop Mode, causes the RAM status
register flag PWRF (IRQ_FLAG.0) to be set to 1 when-
ever V
PWRF has been set to 1 by hardware, it can only be
cleared by the master (or by a system reset). Whenever
PWRF = 1, if the EPWRF interrupt masking bit is also
set to 1, the MAXQ3183 drives IRQ low to signal to the
master that an interrupt condition (in this case, a power-
fail warning) exists and requires attention.
All operations including ADC sampling and SPI com-
munications are synchronized to a single system clock.
This clock can be obtained from any one of three selec-
table sources, as shown in Figure 3.
Figure 3. Simplified Clock Sources
18
______________________________________________________________________________________
DVDD
drops below the V
OSCILLATOR
INTERNAL
CRYSTAL
1MHz
HF
EXTCLK
STOPM
POR
Power-Supply Monitoring
XTAL IN
RING IN
PFW
Clock Sources
STARTUP TIMER
INT/EXT
trip point. Once
CRYSTAL
RING COUNT
ENABLE
GENERATION
CLOCK
The default system clock source for the MAXQ3183 is
an external high-frequency crystal oscillator circuit con-
nected between XTAL1 and XTAL2. When clocked with
an external crystal, a parallel-resonant, AT-cut crystal
oscillating in the fundamental mode is required.
When using a high-frequency crystal, the fundamental
oscillation mode of the crystal operates as inductive
reactance in parallel resonance with external capaci-
tors C1 and C2. The typical values of these external
capacitors vary with the type of crystal being used and
should be selected based on the load capacitance as
suggested by the crystal manufacturer.
Since noise at XTAL1 and XTAL2 can adversely affect
device timing, the crystal and capacitors should always
be placed as close as possible to the XTAL1 and
XTAL2 pins, with connection traces between the crystal
and the device kept as short and direct as possible. In
multiple layer boards, avoid running other high-speed
digital signals underneath the crystal oscillator circuit if
possible, as this could inject unwanted noise into the
clock circuit.
Following power-up or any system reset, the high-fre-
quency clock is automatically selected as the system
clock source. However, before this clock can be used
CLK
ENABLE
WATCHDOG TIMER
SYSTEM CLOCK
External High-Frequency Crystal
WATCHDOG RESET