DS1689 Maxim Integrated Products, DS1689 Datasheet - Page 22

• Manufacturer Part Number: DS1689
• Description: IC RTC SER W/NV RAM CTRL 28-DIP
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/Serializedr

Specifications of DS1689

• Memory Size: 114B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.3 V, 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DS1689/DS1693
Extended Control Register 4B
MSB
LSB
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
ABE
E32K
CS
RCE
PRS
RIE
WIE
KSE
Bit 7: ABE (Auxiliary Battery Enable). This bit, when written to logic 1, enables the V
pin for
BAUX
extended functions.
Bit 6: E32K (Enable 32.768kHz Output). This bit, when written to logic 1, enables the 32,768Hz
oscillator frequency to be output on the SQW pin provided SQWE = 1.
Bit 5: CS (Crystal Select). When CS is set to 0, the oscillator is configured for operation with a crystal
that has a 6pF specified load capacitance. When CS = 1, the oscillator is configured for a 12.5pF crystal.
Bit 4: RCE (RAM Clear Enable). When set to a 1, this bit enables a low level on pin 4 (RCLR) to clear
all 114 bytes of user RAM. When RCE = 0, the RAM clear function is disabled.
Bit 3: PRS (PAB Reset Select). When set to 0 the PWR pin is set high impedance when the DS1689
goes into power-fail. When set to 1, the PWR pin remains active upon entering power-fail.
Bit 2: RIE (RAM Clear Interrupt Enable). When RIE is set to 1, the IRQ pin is driven low when a
RAM clear function is completed.
Bit 1: WIE (Wake-Up Alarm Interrupt Enable). When V
voltage is absent and WIE is set to 1, the
CC
PWR pin is driven active low when a wake-up condition occurs, causing the WF bit to be set to 1. When
V
is then applied, the IRQ pin is also driven low. If WIE is set while system power is applied, both IRQ
CC
and PWR are driven low in response to WF being set to 1. When WIE is cleared to 0, the WF bit has no
effect on the PWR or IRQ pins.
Bit 0: KSE (Kickstart Interrupt Enable). When V
voltage is absent and KSE is set to 1, the PWR pin
CC
is driven active low when a kickstart condition occurs (KS pulsed low), causing the KF bit to be set to 1.
is then applied, the IRQ pin is also driven low. If KSE is set to 1 while system power is
When V
CC
applied, both IRQ and PWR are driven low in response to KF being set to 1. When KSE is cleared to 0,
the KF bit has no effect on the PWR or IRQ pins.
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