DS1553-70 Maxim Integrated Products, DS1553-70 Datasheet - Page 5

IC RTC RAM Y2K 5V 70NS 28-EDIP

DS1553-70

Manufacturer Part Number
DS1553-70
Description
IC RTC RAM Y2K 5V 70NS 28-EDIP
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/NVSRAM/Y2Kr
Datasheet

Specifications of DS1553-70

Memory Size
64K (8K x 8)
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
28-DIP Module (600 mil), 28-EDIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DS1553 64kB, Nonvolatile, Year-2000-Compliant Timekeeping RAM
below V
. RTC operation and SRAM data are maintained from the battery until V
is returned to
SO
CC
nominal levels.
All control, data, and address signals must be powered down when V
is powered down.
CC
BATTERY LONGEVITY
The DS1553 has a lithium power source that is designed to provide energy for the clock activity and
clock and RAM data retention when the V
supply is not present. The capability of this internal power
CC
supply is sufficient to power the DS1553 continuously for the life of the equipment in which it is
installed. For specification purposes, the life expectancy is 10 years at +25C with the internal clock
oscillator running in the absence of V
. Each DS1553 is shipped from Dallas Semiconductor with its
CC
lithium energy source disconnected, guaranteeing full energy capacity. When V
is first applied at a
CC
level greater than V
, the lithium energy source is enabled for battery backup operation.
PF
INTERNAL BATTERY MONITOR
The DS1553 constantly monitors the battery voltage of the internal battery. The Battery Low Flag (BLF)
bit of the Flags register (B4 of 1FF0h) is not writeable and should always be 0 when read. If a 1 is ever
present, an exhausted lithium energy source is indicated, and both the contents of the RTC and RAM are
questionable.
POWER-ON RESET
A temperature-compensated comparator circuit monitors the V
level. When V
falls to the power-fail
CC
CC
trip point, the
signal (open drain) is pulled low. When V
returns to nominal levels, the
signal
RST
RST
CC
continues to be pulled low for 40ms to 200ms. The power-on reset function is independent of the RTC
oscillator and is therefore operational whether or not the oscillator is enabled.
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