DS1557WP-120IND+ Maxim Integrated Products, DS1557WP-120IND+ Datasheet - Page 3

IC RTC RAM Y2K 3.3V 120NS 34PCM

DS1557WP-120IND+

Manufacturer Part Number
DS1557WP-120IND+
Description
IC RTC RAM Y2K 3.3V 120NS 34PCM
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/NVSRAM/Y2Kr
Datasheet

Specifications of DS1557WP-120IND+

Memory Size
4M (512K x 8)
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
34-PowerCap™ Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 1. Block Diagram
Table 1. Operating Modes
DATA READ MODE
The DS1557 is in the read mode whenever CE (chip enable) is low and WE (write enable) is high. The
device architecture allows ripple-through access to any valid address location. Valid data will be available
at the DQ pins within t
satisfied. If CE or OE access times are not met, valid data will be available at the latter of chip enable
access (t
controlled by CE and
intermediate state until t
will remain valid for output data hold time (t
access.
V
V
SO
CC
V
< V
< V
CC
V
CEA
> V
CC
CC
SO
) or at output enable access time (t
<V
<V
PF
PF
PF
V
V
V
V
CE
X
X
AA
IH
IL
IL
IL
AA
OE
after the last address input is stable, providing that CE and OE access times are
. If the address inputs are changed while CE and OE remain valid, output data
. If the outputs are activated before t
V
V
OE
X
X
X
X
IH
IL
WE
V
V
V
X
X
X
IH
IH
IL
DQ0–DQ7
HIGH-Z
HIGH-Z
HIGH-Z
HIGH-Z
D
D
OUT
OH
IN
) but will then go indeterminate until the next address
3 of 17
OEA
). The state of the data input/output pins (DQ) is
Data Retention
Deselect
Deselect
MODE
Write
Read
Read
AA
, the data lines are driven to an
CMOS Standby
Battery Current
POWER
Standby
Active
Active
Active
DS1557
Maxim

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