DS1744-70 Maxim Integrated Products, DS1744-70 Datasheet
DS1744-70
Specifications of DS1744-70
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DS1744-70 Summary of contents
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... DQ2 DQ1 DQ0 GND DS1744/DS1744P A14 CC DS1744 A12 A13 A11 A10 DQ7 11 18 DQ0 DQ6 12 17 DQ1 DQ5 13 16 DQ2 DQ4 14 15 GND DQ3 EDIP DS1744P GND BAT PowerCap MODULE BOARD (Uses DS9034PCX PowerCap) N.C. N.C. A14 A13 A12 A11 A10 ...
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... RST — 33, — N.C. 34 X1, X2, — V BAT DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs FUNCTION Address Input Data Input/Output Ground Active-Low Chip-Enable Input Active-Low Output-Enable Input Active-Low Write-Enable Input Power-Supply Input Active-Low Reset Output, Open Drain. Requires a pullup resistor for proper operation. No Connection ...
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... ORDERING INFORMATION VOLTAGE PART (V) DS1744-70+ 5.0 DS1744-70IND+ 5.0 DS1744W-120+ 3.3 DS1744W-120IND+ 3.3 DS1744P-70+ 5.0 DS1744P-70IND+ 5.0 DS1744WP-120+ 3.3 DS1744WP-120IND+ 3.3 +Denotes a lead(Pb)-free/RoHS-compliant package. *DS9034-PCX+ or DS9034I-PCX+ required (must be ordered separately). **A “+” anywhere in the top mark denotes a lead-free device. An “IND” denotes an industrial temperature grade device. ...
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... CLOCK OPERATIONS—READING THE CLOCK While the double-buffered register structure reduces the chance of reading incorrect data, internal updates to the DS1744 clock registers should be halted before clock data is read to prevent reading of data in transition. However, halting the internal clock register updating process does not affect clock accuracy. ...
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... As shown in Table 2, bit 7 of the century register is the write bit. Setting the write bit like the read bit, halts updates to the DS1744 registers. The user can then load them with the correct day, date, and time data in 24-hour BCD format. Resetting the write bit then transfers those values to the actual clock counters and allows normal operation to resume ...
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... WRITING DATA TO RAM OR CLOCK The DS1744 is in the write mode whenever WE and CE are in their active state. The start of a write is referenced to the latter occurring transition The addresses must be held valid throughout the cycle must return inactive for a minimum of t write cycle ...
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... RST , all control, data, and address signals must be powered down when V BATTERY LONGEVITY The DS1744 has a lithium power source that is designed to provide energy for clock activity and clock and RAM data retention when the V sufficient to power the DS1744 continuously for the life of the equipment in which it is installed. For specification purposes, the life expectancy is 10 years at +25 ...
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... Input) Output Leakage Current (Any Output) Output Logic 1 Voltage (I = -1.0mA) OUT Output Logic 0 Voltage (I = +2.1mA) OUT Write Protection Voltage Battery Switchover Voltage DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs TEMP RANGE 0°C to +70°C, Noncondensing -40°C to +85°C, Noncondesnsing SYMBOL MIN -0.3 ...
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... AC CHARACTERISTICS—READ CYCLE (5V) = 5.0V 10%, (V Over the operating range PARAMETER Read Cycle Time Address Access Time Low-Z CE Access Time CE Data Off Time Low-Z OE Access Time OE Data Off Time Output Hold from Address DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs SYMBOL MIN TYP CC1 I CC2 2.4 ...
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... Over the operating range PARAMETER Read Cycle Time Address Access Time Low-Z CE Access Time CE Data Off Time Low-Z OE Access Time OE Data Off Time Output Hold from Address READ CYCLE TIMING DIAGRAM DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs SYMBOL MIN TYP t 120 CEL t CEA ...
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... Write Cycle Time Address Setup Time WE Pulse Width CE Pulse Width CE and CE2 Pulse Width Data Setup Time Data Hold Time Data Hold Time Address Hold Time Address Hold Time WE Data Off Time Write Recovery Time DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs SYMBOL MIN TYP ...
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... WRITE CYCLE TIMING DIAGRAM, WRITE-ENABLE CONTROLLED WRITE CYCLE TIMING DIAGRAM, CHIP-ENABLE CONTROLLED DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs ...
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... A PARAMETER Before Power-Down IH V Fall Time PF(MAX) PF(MIN) V Fall Time PF(MIN Rise Time PF(MIN) PF(MAX) Power-Up Recover Time Expected Data-Retention Time (Oscillator ON) POWER-UP/DOWN TIMING (5V DEVICE) DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs SYMBOL MIN TYP 300 REC MAX UNITS NOTES s s s ...
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... PF(MAX) PF(MIN) V Rise Time PF(MIN) PF(MAX RST High PF Expected Data-Retention Time (Oscillator ON) POWER-UP/DOWN WAVEFORM TIMING (3.3V DEVICE) CAPACITANCE (T = +25°C) A PARAMETER Capacitance On All Input Pins Capacitance On All Output Pins DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs SYMBOL MIN 300 REC SYMBOL MIN TYP C ...
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... Battery switchover occurs at the lower of either the battery terminal voltage Data-retention time is at +25C. 6) Each DS1744 has a built-in switch that disconnects the lithium source until the user first applies V The expected t is defined for DIP modules and assembled PowerCap modules as a cumulative time ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time 2010 Maxim Integrated Products DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs DESCRIPTION Maxim and the Dallas logo are registered trademarks of Maxim Integrated Products. ...