DS1672S-3+T&R Maxim Integrated Products, DS1672S-3+T&R Datasheet - Page 9
![IC TIMEKEEPER 3V 32-BIT 8-SOIC](/photos/1/39/13902/8-soic_21-0042b_sml.jpg)
DS1672S-3+T&R
Manufacturer Part Number
DS1672S-3+T&R
Description
IC TIMEKEEPER 3V 32-BIT 8-SOIC
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/Trickle-Chargerr
Datasheet
1.DS1672S-33.pdf
(15 pages)
Specifications of DS1672S-3+T&R
Time Format
Binary
Date Format
Binary
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Clock Accuracy
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Additional error will be added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit may result in the clock running fast. Refer to Application
Note 58: “Crystal Considerations with Dallas Real-Time Clocks” for detailed information.
Address Map
The counter is accessed by reading or writing the first 4 bytes of the DS1672 (00h–03h). The control
register and trickle charger are accessed by reading or writing the appropriate register bytes as illustrated
in Table 2. If the master continues to send or request more data after the address pointer has reached 05h,
the address pointer will wrap around to location 00h.
Table 2. Registers
Power Control
The device is fully accessible and data can be written and ready only when V
However, when V
are blocked from any access. If V
V
V
the V
Table 3. Power Control
Oscillator Control
The EOSC bit (bit 7 of the control register) controls the oscillator when in back-up mode. This bit when
set to logic 0 will start the oscillator. When this bit is set to a logic 1, the oscillator is stopped and the
DS1672 is placed into a low-power standby mode (I
powered by V
is incremented only when EOSC is a logic 0.
V
V
V
V
ADDRESS
BACKUP
CC
SUPPLY CONDITION
CC
CC
CC
CC
to V
00h
01h
02h
03h
04h
05h
BACKUP
< V
< V
> V
> V
when V
BACKUP
PF
PF
PF
PF
, V
, V
, V
, V
source until V
CC,
CC
CC
CC
CC
EOSC
MSB
TCS
B7
when V
the oscillator is always on regardless of the status of the EOSC bit; however, the counter
CC
< V
> V
< V
> V
CC
drops below V
BACKUP
BACKUP
BACKUP
BACKUP
falls below V
TCS
CC
B6
CC
drops below V
is returned to nominal levels (see Table 3).
READ/WRITE
TCS
B5
ACCESS
PF
PF
PF
, (point at which write protection occurs) the internal clock registers
. If V
Yes
Yes
No
No
is less than V
TCS
B4
PF
BACKUP
is greater than V
. Oscillator and counter operation are maintained from
9 of 15
DS
B3
BACKUP
BACKUP
Inactive
Inactive
Active
Active
RST
) when in backup mode. When the DS1672 is
, the device power is switched from V
DS
B2
BACKUP
, the device power is switched from
RS
B1
POWERED BY
V
BACKUP
V
V
V
CC
CC
CC
LSB
B0
RS
CC
is greater than V
Counter Byte 1
Counter Byte 2
Counter Byte 3
Counter Byte 4
Control
Trickle Charger
FUNCTION
CC
PF
to
.