DP8573AV/NOPB National Semiconductor, DP8573AV/NOPB Datasheet - Page 10

• Manufacturer Part Number: DP8573AV/NOPB
• Description: IC REAL TIME CLOCK (RTC) 28-PLCC
• Manufacturer: National Semiconductor
• Type: Clock/Calendar/NVSRAMr
• Series: -r

Specifications of DP8573AV/NOPB

• Memory Size: 32B
• Time Format: HH:MM:SS:hh (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-PLCC
• Features: Alarm, Leap Year
• Voltage - Supply, Battery: 2.2 V ~ 5.1 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP8573AV; *DP8573AV/NOPB; DP8573AV

Functional Description
ternal interrupt will be issued Note that the linear power fail
circuitry is switched off automatically when using V
standby mode
INITIAL POWER ON DETECT AND
POWER FAIL TIME SAVE
There are two other functions provided on the DP8573A to
ease power supply control These are an initial Power On
detect circuit which also can be used as a time keeping
failure detect and a time save on power failure
On initial power up the Oscillator Fail Flag will be set to a
one and the real time clock start bit reset to a zero This
indicates that an oscillator fail event has occurred and time
keeping has failed
The Oscillator Fail flag will not be reset until the real-time
clock is started This allows the system to discriminate be-
tween an initial power-up and recovery from a power failure
If the battery backed mode is selected then bit D6 of the
Periodic Flag Register must be written low This will not af-
fect the contents of the Oscillator Fail Flag
To relieve CPU overhead for saving time upon power failure
the Time Save Enable bit is provided to do this automatical-
ly (See also Reading the Clock Latched Read ) The Time
Save Enable bit when set causes the Time Save RAM to
follow the contents of the clock This bit can be reset by
software but if set before a power failure occurs it will auto-
matically be reset when the clock switches to the battery
supply (not when a power failure is detected by the PFAIL
pin) Thus writing a one to the Time Save bit enables both a
software write or power fail write
SINGLE POWER SUPPLY APPLICATIONS
The DP8573A can be used in a single power supply applica-
tion To achieve this the V
ground and the power connected to V
Failed Single Supply bit in the Periodic Flag Register should
be set to a logic 1 which will disable the oscillator battery
reference circuit The power fail interrupt should also be dis-
abled This will turn off the linear power fail detection cir-
cuits and will eliminate any quiescent power drawn through
these circuits
DETAILED REGISTER DESCRIPTION
There are 5 external address bits Thus the host microproc-
essor has access to 28 locations at one time An internal
switching scheme provides a total of 30 locations
The only register that does not get switched is the Main
Status Register It contains the register select bit as well as
status information
A memory map is shown in Figure 2 and register addressing
in Table III They show the name address and page loca-
tions for the DP8573A
BB
pin must be connected to
(Continued)
CC
The Oscillator
BB
in
10
Note 1 RS Register Select (Bit D6 of Main Status Register)
A0-4
CONTROL REGISTERS
COUNTERS (CLOCK CALENDAR)
TIME COMPARE RAM
TIME SAVE RAM
0C
0D
1C
1D
00
01
02
03
04
01
02
03
04
05
06
07
08
09
0A
0B
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
1E
1F
(Note 1)
RS
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
1
TABLE III Register Counter RAM
Addressing for DP8573A
Main Status Register
N A
N A
Periodic Flag Register
Time Save Control Register
Real Time Mode Register
Output Mode Register
Interrupt Control Register 0
Interrupt Control Register 1
1 100 1 10 Seconds
Seconds
Minutes
Hours
Days of Month
Months
Years
RAM
D0 D1 bits only
Day of Week
N A
N A
N A
N A
Sec Compare RAM
Min Compare RAM
Hours Compare RAM
DOM Compare RAM
Months Compare RAM (1– 12)
DOW Compare RAM
Seconds Time Save RAM
Minutes Time Save RAM
Hours Time Save RAM
Day of Month Time Save RAM
Months Time Save RAM
RAM
RAM Test Mode Register
Description
(0– 99)
(0 – 59)
(0 – 59)
(1 – 12 0– 23)
(1– 28 29 30 31)
(1 – 12)
(0 – 99)
(1– 7)
(0– 59)
(0– 59)
(1– 12 0 – 23)
(1– 28 29 30 31)
(1– 7)