ISL12029IV27AZ Intersil, ISL12029IV27AZ Datasheet - Page 16

• Manufacturer Part Number: ISL12029IV27AZ
• Description: IC RTC/CALENDAR EEPROM 14-TSSOP
• Manufacturer: Intersil
• Type: Clock/Calendar/Supervisor/EEPROMr

Specifications of ISL12029IV27AZ

• Memory Size: 4K (512 x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If the Alarm1 is used, SCA1 would need to have the correct
data written.
Power Control Operation
The power control circuit accepts a V
Many types of batteries can be used with Intersil RTC
products. For example, 3.0V or 3.6V Lithium batteries are
appropriate, and battery sizes are available that can power
an Intersil RTC device for up to 10 years. Another option is
to use a SuperCap for applications where V
for up to a month. See “Application Section” on page 23 for
more information.
There are two options for setting the change-over conditions
from V
register controls this operation.
Option 1 - Standard Mode (Default for ISL12029A)
Option 2 - Legacy Mode (Default for ISL12029)
Note that applications that have V
ISL12029A (standard mode) for proper startup. Note that the
I
backup, that function is controlled by the SBIB bit. That
operation is covered after the power control section.
OPTION 1 - STANDARD POWER CONTROL MODE
(DEFAULT FOR ISL12029A)
In the Standard mode, the supply will switch over to the
battery when V
lower. In this mode, accidental operation from the battery is
2
2. Other non-volatile writes: It is possible to do writes of
TABLE 7. V
BSW BIT
C bus may or may not be operational during battery
overlapping to the following Alarm's Seconds register is
advised.
less than an entire page, but the final byte must always
be addresses 0000h through 0004h or 0008h though
000Ch to trigger a non-volatile write. Writing to those
blocks of 5 bytes sequentially, or individually, will trigger a
non-volatile write. If the DWA0 or DWA1 registers need to
be set, then enough bytes will need to be written to
overlap with the other Alarm register and trigger the
non-volatile write. For Example, if the DWA0 register is
being set, then the code can start with a multiple byte
write beginning at address 0006h, and then write 3 bytes
ending with the SCA1 register as follows:
Addr
0006h DWA0
0007h Y2K0
0008h SCA1
0
1
DD
to Battery back-up mode. The BSW bit in the PWR
Name
BAT
V
BAT
DD
V
TRIP POINT WITH DIFFERENT BSW SETTING
DD
TRIP POINT
drops below VTRIP or VBAT, whichever is
(V)
2.2
< V
BAT
16
Standard Mode (ISL12029A)
POWER CONTROL SETTING
Legacy Mode (ISL12029)
BAT
DD
> V
and a V
DD
DD
will require the
is interrupted
BAT
ISL12029, ISL12029A
input.
prevented since the battery backup input will only be used
when the V
To select Option 1, BSW bit in the Power Register must be
set to “BSW = 0”. A description of power switchover follows.
Standard Mode Power Switchover
• Normal Operating Mode (V
To transition from the V
following conditions must be met:
- Condition 1:
- Condition 2:
• Battery Backup Mode (V
The ISL12029 device will switch from the V
when one of the following conditions occurs:
- Condition 1:
- Condition 2:
There are two discrete situations that are possible when using
Standard Mode: V
power control situations are illustrated in Figures 13 and 14.
(V
V
where V
V
where V
V
where V
V
where V
FIGURE 13. BATTERY SWITCHOVER WHEN V
FIGURE 14. BATTERY SWITCHOVER WHEN V
DD
DD
DD
DD
V
V
V
BAT
V
V
TRIP
V
TRIP
BAT
BAT
DD
DD
V
< V
< V
> V
> V
BAT
)
BATHYS
TRIP
BATHYS
TRIPHYS
BAT
TRIP
BAT
TRIP
DD
- V
V
BATHYS
TRIP
supply is shut off.
- V
+ V
≈ 2.2V
+ V
BATHYS
BAT
BATHYS
≈ 50mV
≈ 50mV
TRIPHYS
≈ 30mV
< V
BATTERY BACKUP
DD
TRIP
to V
BAT
BATTERY
MODE
BACKUP
DD
MODE
and V
) to Normal Mode (V
BAT
) to Battery Backup Mode
mode, both of the
BAT
> V
V
BAT
TRIP
TRIP
V
BAT
December 16, 2010
to V
BAT
BAT
+ V
. These two
+ V
TRIPHYS
DD
< V
> V
DD
BATHYS
3.0V
2.2V
FN6206.10
2.2V
1.8V
)
TRIP
TRIP
mode