ISL12024IRTCZ Intersil, ISL12024IRTCZ Datasheet - Page 22

IC RTC/CALENDER 64BIT 8-TDFN

ISL12024IRTCZ

Manufacturer Part Number
ISL12024IRTCZ
Description
IC RTC/CALENDER 64BIT 8-TDFN
Manufacturer
Intersil
Type
Clock/Calendar/EEPROMr
Datasheet

Specifications of ISL12024IRTCZ

Memory Size
4K (512 x 8)
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TDFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Backup Battery Operation
Many types of batteries can be used with the Intersil RTC
products. 3.0V or 3.6V Lithium batteries are appropriate, and
sizes are available that can power a Intersil RTC device for
up to 10 years. Another option is to use a super capacitor for
applications where V
short periods of time. Depending on the value of
superconductor used, backup time can last from a few days
to two weeks (with >1F). A simple silicon or Schottky barrier
diode can be used in series with V
superconductor, which is connected to the V
use Schottky diodes with very low leakages, <1
Do not use the diode to charge a battery (especially lithium
batteries!)
There are two possible modes for battery backup operation;
Standard and Legacy Mode. In Standard Mode, there are no
operational concerns when switching over to battery backup
since all other devices functions are disabled. Battery drain
is minimal in Standard Mode, and return to Normal V
powered operations is predictable. In Legacy Mode, the
V
less than V
and communicate with the device, unless SBI = 1, but the
supply current drain is much higher than the Standard Mode
and backup time is reduced. In this case if alarms are used
in backup mode, the IRQ/F
connected to V
the default mode is the Standard Mode.
Alarm Operation Examples
Below are examples of both Single Event and periodic
Interrupt Mode alarms.
EXAMPLE 1
Alarm0 set with single interrupt (IM = “0”)
A single alarm will occur on January 1 at 11:30am.
A. Set Alarm0 registers as follows:
REGISTER
ALARM0
BAT
2.7V TO 5.5V
MNA0
SCA0
FIGURE 24. SUPERCAPACITOR CHARGING CIRCUIT
pin can power the chip if the voltage is above V
TRIP
7 6 5 4 3 2 1 0 HEX
0 0 0 0 0 0 0 0
1 0 1 1 0 0 0 0
BAT
. In this mode, it is possible to generate alarm
voltage source. During initial power-up
DD
V
DD
may disappear intermittently for
BIT
V
OUT
SS
22
V
BAT
pull-up resistor must be
DD
to charge the
B0h Minutes set to 30,
00h Seconds disabled
enabled
SUPERCAPACITOR
BAT
DESCRIPTION
µA
pin. Try to
desirable.
DD
DD
ISL12024IRTCZ
and
B. Also, the AL0E bit must be set as follows:
After these registers are set, an alarm will be generated when
the RTC advances to exactly 11:30am on January 1 (after
seconds changes from 59 to 00) by setting the AL0 bit in the
status register to “1” and also bringing the IRQ/F
low.
EXAMPLE 2
Pulsed interrupt once per minute (IM = “1”)
Interrupts at one minute intervals when the seconds register
is at 30 seconds.
A. Set Alarm0 registers as follows:
B. Set the Interrupt register as follows:
REGISTER
REGISTER
REGISTER
REGISTER
CONTROL
CONTROL
ALARM0
ALARM0
MOA0
DWA0
HRA0
DWA0
DTA0
MNA0
MOA0
SCA0
HRA0
DTA0
INT
INT
7 6 5 4 3 2 1 0 HEX
1 0 0 1 0 0 0 1
1 0 0 0 0 0 0 1
1 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0 HEX
1 0 1 0 0 0 0 0 x0h Enable Alarm and Int
7 6 5 4 3 2 1 0 HEX
1 0 1 1 0 0 0 0 B0h Seconds set to 30,
0 0 0 0 0 0 0 0 00h Minutes disabled
0 0 0 0 0 0 0 0 00h Hours disabled
0 0 0 0 0 0 0 0 00h Date disabled
0 0 0 0 0 0 0 0 00h Month disabled
0 0 0 0 0 0 0 0 00h Day of week disabled
7 6 5 4 3 2 1 0 HEX
0 0 1 0 0 0 0 0
BIT
BIT
BIT
BIT
91h Hours set to 11,
81h Date set to 1,
81h Month set to 1,
00h Day of week
x0h Enable Alarm
Mode
enabled
DESCRIPTION
DESCRIPTION
enabled
enabled
enabled
disabled
DESCRIPTION
DESCRIPTION
OUT
August 8, 2008
output
FN6749.0

Related parts for ISL12024IRTCZ