ISL12026AIBZ Intersil, ISL12026AIBZ Datasheet - Page 4
ISL12026AIBZ
Manufacturer Part Number
ISL12026AIBZ
Description
IC RTC/CALENDAR EEPROM 8-SOIC
Manufacturer
Intersil
Type
Clock/Calendar/EEPROMr
Datasheet
1.ISL12026IBZ-T.pdf
(24 pages)
Specifications of ISL12026AIBZ
Memory Size
512B
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
EEPROM Specifications
Serial Interface (I
DC Electrical Specifications
AC Electrical Specifications
EEPROM Endurance
EEPROM Retention
Hysteresis SDA and SCL Input Buffer
SYMBOL
SYMBOL
t
t
t
t
SU:STA
HD:STA
SU:DAT
HD:DAT
t
t
t
f
HIGH
V
LOW
V
I
SCL
t
BUF
V
t
I
LO
AA
IN
OL
LI
IH
IL
PARAMETER
SCL Frequency
Pulse width Suppression Time at
SDA and SCL Inputs
SCL Falling Edge to SDA Output
Data Valid
Time the Bus Must be Free Before
the Start of a New Transmission
Clock LOW Time
Clock HIGH Time
START Condition Set-up Time
START Condition Hold Time
Input Data Set-up Time
Input Data Hold Time
SDA and SCL Input Buffer LOW
Voltage
SDA and SCL Input Buffer HIGH
Voltage
Hysteresis
SDA Output Buffer LOW Voltage
Input Leakage Current on SCL
I/O Leakage Current on SDA
PARAMETER
PARAMETER
2
C) Specifications
4
Temperature ≤ +75°C
TEST CONDITIONS
I
V
V
Any pulse narrower than the max
spec is suppressed.
SCL falling edge crossing 30% of
V
of V
SDA crossing 70% of V
STOP condition, to SDA crossing
70% of V
START condition.
Measured at the 30% of V
crossing.
Measured at the 70% of V
crossing.
SCL rising edge to SDA falling edge.
Both crossing 70% of V
From SDA falling edge crossing
30% of V
crossing 70% of V
From SDA exiting the 30% to 70% of
V
crossing 30% of V
From SCL rising edge crossing 70%
of V
70% of V
OL
IN
IN
DD
DD
= 4mA
= 5.5V
= 5.5V
DD
DD
, until SDA exits the 30% to 70%
window, to SCL rising edge
ISL12026, ISL12026A
TEST CONDITIONS
window.
to SDA entering the 30% to
TEST CONDITIONS
DD
DD
DD
during the following
to SCL falling edge
window.
DD
DD
.
.
DD
DD
DD
DD
.
during a
>2,000,000
(Note 16)
MIN
50
0.05 x V
(Note 16)
0.7 x V
MIN
-0.3
(Note 16)
0
1300
1300
MIN
600
600
600
100
DD
0
DD
TYP
TYP
100
100
TYP
(Note 16)
MAX
V
(Note 16)
0.3xV
DD
(Note 16)
MAX
0.4
MAX
+ 0.3
400
900
50
DD
UNITS
Cycles
Years
UNITS
UNITS
kHz
nA
nA
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
November 30, 2010
NOTES
NOTES
NOTES
FN8231.9