DS1558W+ Maxim Integrated Products, DS1558W+ Datasheet - Page 10

IC RTC W/NV RAM 3.3V 48-LQFP

DS1558W+

Manufacturer Part Number
DS1558W+
Description
IC RTC W/NV RAM 3.3V 48-LQFP
Manufacturer
Maxim Integrated Products
Type
Watchdog Timer/NVSRAMr
Datasheet

Specifications of DS1558W+

Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Figure 4. BACKUP MODE ALARM WAVEFORMS
USING THE WATCHDOG TIMER
The watchdog timer can be used to detect an out-of-control processor. T
timer by setting the desired am
five watchdog register bits BMB4–BMB0
RB1–RB0 select the resolution, where 00 = 1/16 second, 01 = 1/4 second, 10
11 = 4 seconds. The watchdog timeout value is then determined by the multiplic
multiplier value with the 2-bit resolution value. (For example: writing 00001110 in the
= 3 x 1 second or 3 seconds.) If the processor does not reset the timer within the sp
watchdog flag (WF) is set and a processor interrupt is generated and stays active until either WF is read
or the watchdog register (7FFF7h) is read or written.
The MSB of the watchdog register is the watchdog steering bit (WDS). When set to
activates the
be initialized to a 0 if the watchdog function is enabled.
The watchdog timer resets when the processor performs a read or write of the watc
timeout period then starts over. The watchdog timer is disabled by writing a value of 0
register. The watchdog function is automatically disabled upon power-up and the w
cleared.
POWER-ON DEFAULT STATES
Upon application of power to the device, the following register bits are set to a 0:
All other bits are undefined.
IRQ
/FT output when the watchdog times out. WDS should not be written
WDS = 0, BMB0–BMB4 = 0, RB0–RB1 = 0, AE = 0, and ABE = 0
ount of timeout into the 8-bit watchdog register (address 7FFF7h). The
sto
re a binary multiplier and the two lower-order bits
10 of 18
he user programs the watchdog
0h to the watchdog
atchdog register is
hdog register. The
ecified period, the
ation of the 5-bit
a 0, the w
to a 1, and should
= 1 second, and
watchdog register
atchd
og

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