DS1338U-33+ Maxim Integrated Products, DS1338U-33+ Datasheet - Page 4

• Manufacturer Part Number: DS1338U-33+
• Description: IC RTC 56BYTE NV RAM 3.3V 8-USOP
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/NVSRAMr

Specifications of DS1338U-33+

• Memory Size: 56B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Function: Clock/Calendar
• Rtc Memory Size: 56 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (I2C)
• Supply Current: 325 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

POWER-UP/POWER-DOWN CHARACTERISTICS
(T
Warning: Negative undershoots below -0.3V while the part is in battery-backed mode may cause
loss of data.
Figure 1. Power-Up/Power-Down Timing
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Recovery at Power-Up (Note 15)
V
V
A
CC
CC
= -40°C to +85°C) (Note 1, Figure 1)
Fall Time; V
Rise Time; V
Limits at -40°C are guaranteed by design and not production tested.
All voltages are referenced to ground.
SCL only.
SDA and SQW/OUT.
I
Specified with the I
Measured with a 32.768kHz crystal attached to X1 and X2.
After this period, the first clock pulse is generated.
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
bridge the undefined region of the falling edge of SCL.
The maximum t
A fast-mode device can be used in a standard-mode system, but the requirement t
automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW
period of the SCL signal, it must output the next data bit to the SDA line t
is released.
C
Guaranteed by design. Not production tested.
The parameter t
0.0V ≤ V
This delay applies only if the oscillator is enabled and running. If the oscillator is disabled or stopped, no power-up delay occurs.
CCA
B
—total capacitance of one bus line in pF.
—SCL clocking at max frequency = 400kHz.
OUTPUTS
PARAMETER
CC
PF(MAX)
V
INPUTS
V
PF(MIN)
PF(MAX)
PF(MIN)
≤ V
V
CC(MAX)
CC
HD:DAT
OSF
to V
to V
2
is the time period the oscillator must be stopped for the OSF flag to be set over the voltage range of
C bus inactive.
and 1.3V ≤ V
need only be met if the device does not stretch the LOW period (t
PF(MIN)
PF(MAX)
RECOGNIZED
VALID
t
VCCF
BAT
≤ 3.7V.
SYMBOL
4 of 16
t
t
t
VCCF
VCCR
REC
DON'T CARE
HIGH-Z
R(MAX)
+ t
MIN
300
0
SU:DAT
DS1338 I
SU:DAT
= 1000 + 250 = 1250ns before the SCL line
LOW
≥ to 250ns must then be met. This is
) of the SCL signal.
t
2
VCCR
TYP
C RTC with 56-Byte NV RAM
IH(MIN)
RECOGNIZED
t
REC
VALID
of the SCL signal) to
MAX
2
UNITS
ms
s
s