DS1110S-100+ Maxim Integrated Products, DS1110S-100+ Datasheet - Page 5

• Manufacturer Part Number: DS1110S-100+
• Description: DELAY LINE 10-TAP 16-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS1110S-100+

• Number Of Taps/steps: 10
• Function: Tapped
• Delay To 1st Tap: 10nS
• Tap Increment: 10nS
• Available Total Delays: 100ns
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Propagation Delay Time: 100 ns
• Supply Voltage (min): 4.75 V
• Operating Temperature Range: 0 C to + 70 C
• High Level Output Current: - 1 mA
• Logic Family: 74LS
• Logic Type: CMOS, TTL
• Low Level Output Current: 12 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.25 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Independent Delays: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TEST CIRCUIT Figure 3
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
t
input pulse.
t
input pulse.
t
pulse and the 1.5V point on the leading edge of any tap output pulse.
t
pulse and the 1.5V point on the trailing edge of any tap output pulse.
WI
RISE
FALL
PLH
PHL
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
(Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input
(Time Delay Rising): The elapsed time between the 1.5V point on the leading edge of the input
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
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