LMX2301TM National Semiconductor, LMX2301TM Datasheet - Page 2

• Manufacturer Part Number: LMX2301TM
• Description: IC FREQ SYNTHESIZER 20-TSSOP
• Manufacturer: National Semiconductor
• Series: PLLatinum™r
• Type: PLL Frequency Synthesizerr

Specifications of LMX2301TM

• Pll: Yes
• Input: Clock
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 160MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 160MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *LMX2301TM

http
Pin No
2 9 12
Connection Diagram
Pin Descriptions
10
11
13
14
15
16
17
18
19
20
www national com
1
3
4
5
6
7
8
Pin Name
OSC
OSC
V
V
D
GND
LD
f
CLOCK
DATA
LE
FC
BISW
f
PWDN
NC
IN
OUT
P
CC
o
p
r
IN
OUT
I O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
Oscillator input A CMOS inverting gate input intended for connection to a crystal resonator for
operation as an oscillator The input has a V
external CMOS or TTL logic gate May also be from a reference oscillator
Oscillator output
Power supply for charge pump Must be
Power supply voltage input Input may range from 2 7V to 5 5V Bypass capacitors should be
placed as close as possible to this pin and be connected directly to the ground plane
Internal charge pump output For connection to a loop filter for driving the input of an external
VCO
Ground
Lock detect Output provided to indicate when the VCO frequency is in ‘‘lock’’ When the loop is
locked the pin’s output is HIGH with narrow low pulses
RF buffer input Small signal input from the VCO
High impedance CMOS Clock input Data is clocked in on the rising edge into the various
counters and registers
Binary serial data input Data entered MSB first LSB is control bit High impedance CMOS input
Load enable input (with internal pull-up resistor) When LE transitions HIGH data stored in the
shift registers is loaded into the appropriate latch (control bit dependent) Clock must be low
when LE toggles high or low See Serial Data Input Timing Diagram
Phase control select (with internal pull-up resistor) When FC is LOW the polarity of the phase
comparator and charge pump combination is reversed
Analog switch output When LE is HIGH the analog switch is ON routing the internal charge
pump output through BISW (as well as through D
Monitor pin of phase comparator input CMOS output
Output for external charge pump
resistor
Power Down (with internal pull-up resistor)
PWDN
PWDN
Power down function is gated by the return of the charge pump to a TRI-STATE condition
Output for external charge pump
No connect
Order Number LMX2301TM or LMX2301TMX
e
e
HIGH for normal operation
LOW for power saving
20-Lead (0 173 Wide) Thin Shrink
See NS Package Number MTC20
Small Outline Package (TM)
LMX2301
2
p
r
is a CMOS logic output
is an open drain N-channel transistor and requires a pull-up
t
Description
V
CC
CC
2 input threshold and can be driven from an
o
)
TL W 12458 – 2