LMX1511TM National Semiconductor, LMX1511TM Datasheet - Page 15

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LMX1511TM

Manufacturer Part Number
LMX1511TM
Description
IC FREQ SYNTHESZ 1.1GHZ 20-TSSOP
Manufacturer
National Semiconductor
Series
PLLatinum™r
Type
PLL Frequency Synthesizerr
Datasheet

Specifications of LMX1511TM

Pll
Yes
Input
CMOS, TTL
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
Yes/No
Frequency - Max
1.1GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
1.1GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*LMX1511TM

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Application Information
LOOP FILTER DESIGN
A block diagram of the basic phase locked loop is shown
An example of a passive loop filter configuration including
the transfer function of the loop filter is shown in Figure 2
Define the time constants which determine the pole and
zero frequencies of the filter transfer function by letting
and
The PLL linear model control circuit is shown along with the
open loop transfer function in Figure 3 Using the phase
detector and VCO gain constants K
loop filter transfer function Z(s) the open loop Bode plot
can be calculated The loop bandwidth is shown on the
Bode plot ( p) as the point of unity gain The phase margin
is shown to be the difference between the phase at the unity
gain point and
Open Loop Gain
Closed Loop Gain
e
T2
T1
K Z(s) K
e
e
R2
Z(s)
R2
FIGURE 2 2nd Order Passive Filter
e
C1
b
VCO
C1 C2
C2
180
s
e
2
a
e
(C1 C2 R2)
Ns
C2
i
o
e
s (C2 R2)
e
i
e
H(s) G(s)
G(s) 1
a
FIGURE 1 Basic Charge Pump Phase Locked Loop
a
sC1
a
and K
1
H(s) G(s)
a
TL W 12340 – 31
sC2
VCO
TL W 12340 – 33
and the
(1a)
(1b)
15
Thus we can calculate the 3rd order PLL Open Loop Gain in
terms of frequency
G(s) H(s)
From equation 2 we can see that the phase term will be
dependent on the single pole and zero such that
By setting
we find the frequency point corresponding to the phase in-
flection point in terms of the filter time constants T1 and T2
This relationship is given in equation 5
For the loop to be stable the unity gain point must occur
before the phase reaches
want the phase margin to be at a maximum when the magni-
tude of the open loop gain equals 1 Equation 2 then gives
( )
FIGURE 3 Open Loop Transfer Function
d
d
C1
e
l
s
e
e
tan
e
1
j
b
K
a
1
e
(
p
(
T2
2
K
b
p
VCO
N T2
T2)
K
T2)
e
2
C1 N(1
1 T2 T1
2
b
b
b
T1
K
180 degrees We therefore
tan
VCO
1
(1
(1
a
b
(1
a
a
1
a
(
T1
(
a
j
j
j
p
p
j
T1)
T1)
T1)
T2)
T1)
2
T2)
e
a
TL W 12340– 30
TL W 12340– 32
180
0
T1
T2
(2)
(3)
(4)
(5)
(6)

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