SY89538LHG Micrel Inc, SY89538LHG Datasheet - Page 21

• Manufacturer Part Number: SY89538LHG
• Description: IC SYNTH/BUFF LVPECL/LVDS 64TQFP
• Manufacturer: Micrel Inc
• Series: Precision Edge®r
• Type: Clock Synthesizer/Fanout Bufferr

Specifications of SY89538LHG

• Pll: Yes
• Input: CMOS, HSTL, LVDS, LVPECL, LVTTL, SSTL, Crystal
• Output: LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:7
• Differential - Input:output: Yes/Yes
• Frequency - Max: 756MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.375 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
• Frequency-max: 756MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3240; SY89538LHG

Output Bank and Frequency Control
There are five independently programmable output
frequency banks, four differential LVPECL output
banks and one differential LVDS output bank with
three output pairs. Each bank has frequency control
DSEL, SELx and Enx to generate different divider
ratios (see “LVPECL and LVDS Output Post-Divider
Frequency Select” Tables). It can be programmed for
pass-through, internal divided VCO clock divide-by-
/2, /8 or disable state. When disabled, the non-
inverted output goes to static LOW and the inverted
output goes to static HIGH.
Output Logic Characteristics
See “Output Termination Recommendations” for
proper termination. When LVPECL single-ended
output is desired, the unused complimentary output
should be terminated. Unused LVPECL output pairs
can be left floating. LVDS output pairs should be
terminated with 100Ω across the pair. In order to
minimize jitter and skew, unused LVDS output banks
and unused LVDS output pairs should be terminated
with 100Ω across each pair.
LVPECL Outputs:
LVDS Outputs:
Output Termination Recommendations
LVPECL
LVPECL has high input impedance, very low output
(open emitter) impedance, and small signal swing
which results in low EMI. LVPECL is ideal for driving
50Ω-and-100Ω-controlled
lines. There are several techniques for terminating the
LVPECL output: Single-ended termination, Parallel
Termination
Y-Termination, and AC-coupled termination.
Single-Ended LVPECL Termination
Unused output pairs may be left floating. Terminating
single-ended and unused outputs will enhance the
performance. Terminate LVPECL outputs by 50Ω to
V
V
more details.
DC-Coupled LVPECL Parallel Termination
Terminate LVPECL by an output impedance of 50Ω to
V
V
combination is 130Ω||82Ω. See Figure 12a for details.
June 2006
CC
CC
CC
CC
–2V. The unused input terminal must be biased to
–1.3V using a resistor network. See Figure 11h for
–2V. Termination resistor values are a function of
. For a 3.3V supply, the optimal parallel
•
•
•
•
Typical voltage swing is 800mV into 50Ω.
Common mode voltage is V
Typical voltage swing is 325mV into 100Ω.
Common mode voltage is 1.2V.
Thevenin-Equivalent,
impedance
CCO
–1.3V.
transmission
3-Resistor
21
The LVPECL output can also be terminated with three
50Ω resistors as shown in Figure 12b. A 0.1µF low
ESR decoupling capacitor from V
recommended in order to reduce noise in the signal.
AC-Coupled LVPECL Termination
While terminating an AC-coupled LVPECL signal, pull-
down resistor is used to create a DC current path to
GND to produce an output swing. For 3.3V supply,
100Ω provides the necessary pull-down. At the final
destination, proper termination to create a V
termination bias is required 82Ω||130Ω. Please refer
to Figure 12c.
Figure 12a. LVPECL Parallel Thevenin-Equivalent
Figure 12b. LVPECL Parallel Termination
Figure 12c. LVPECL AC-Coupled Parallel
Thevenin-Equivalent
[e-mail]
CC
to Y-Junction is
or [phone]
M9999-062706-D
CC
–1.3V