CY2308SI-1 Cypress Semiconductor Corp, CY2308SI-1 Datasheet - Page 3

• Manufacturer Part Number: CY2308SI-1
• Description: IC CLK ZDB 8OUT 133MHZ 16SOIC
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Distribution, Zero Delay Bufferr

Specifications of CY2308SI-1

• Pll: Yes with Bypass
• Input: LVCMOS, LVTTL
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:8
• Differential - Input:output: No/No
• Frequency - Max: 133.3MHz
• Divider/multiplier: No/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Frequency-max: 133MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1351

Pinouts
Table 1. Pin Definitions - 16 Pin SOIC
Select Input Decoding
Document Number: 38-07146 Rev. *L
Notes
1. Weak pull down.
2. Weak pull down on all outputs.
3. Weak pull ups on these inputs.
4. Outputs inverted and PLL bypass mode for 2308–2 and 2308–3, S2 = 1 and S1 = 0.
Pin
S2
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
0
0
1
1
REF
CLKA1
CLKA2
V
GND
CLKB1
CLKB2
S2
S1
CLKB3
CLKB4
GND
V
CLKA3
CLKA4
FBK
DD
DD
[3]
[3]
[1]
S1
0
1
0
1
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Signal
CLOCK A1–A4
Driven
Tri-state
Driven
Driven
Figure 1. Pin Diagram - 16 Pin SOIC (Top view)
Power supply ground
Input reference frequency
Clock output, Bank A
Clock output, Bank A
Power supply voltage
Power supply ground
Clock output, Bank B
Clock output, Bank B
Select input, bit 2
Select input, bit 1
Clock output, Bank B
Clock output, Bank B
Power supply voltage
Clock output, Bank A
Clock output, Bank A
PLL feedback input
[4]
CLKA1
CLKA2
CLKB1
CLKB2
GND
REF
V
S2
DD
CLOCK B1–B4
1
2
3
4
5
6
7
8
Driven
Tri-state
Tri-state
Driven
[4]
15
14
13
12
11
10
16
9
FBK
CLKA4
CLKA3
V
GND
CLKB4
CLKB3
S1
DD
Description
Output Source
Reference
PLL
PLL
PLL
PLL Shutdown
Y
N
Y
N
CY2308
Page 3 of 17
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