ADF4360-5BCPRL7 Analog Devices Inc, ADF4360-5BCPRL7 Datasheet - Page 17

• Manufacturer Part Number: ADF4360-5BCPRL7
• Description: IC INTEG SYNTH/VCO 24-LFCSP T/R
• Manufacturer: Analog Devices Inc
• Type: Fanout Distribution, Integer N Synthesizer (RF)r

Specifications of ADF4360-5BCPRL7

• Rohs Status: RoHS non-compliant
• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 1.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-LFCSP
• Frequency-max: 1.4GHz
• For Use With: EVAL-ADF4360-5EBZ1 - BOARD EVALUATION FOR ADF4360-5

Hardware Power-Up/Power-Down
If the ADF4360-5 is powered down via the hardware (using the
CE pin) and powered up again without any change to the N
counter register during power-down, it locks at the correct fre-
quency because it is already in the correct frequency band. The
lock time depends on the value of capacitance on the C
which is <5 ms for 10 µF capacitance. The smaller capacitance
of 440 nF on this pin enables lock times of <600 µs.
The N counter value cannot be changed while the part is in
power-down because the part may not lock to the correct fre-
quency on power-up. If it is updated, the correct programming
sequence for it after power-up is to the R counter latch, followed
by the control latch, and finally the N counter latch, with the
required interval between the control latch and N counter latch,
as described in the Initial Power-Up section.
N
pin,
Rev. A | Page 17 of 24
Software Power-Up/Power-Down
If the ADF4360-5 is powered down via the software (using the
control latch) and powered up again without any change to the
N counter latch during power-down, it locks at the correct fre-
quency because it is already in the correct frequency band. The
lock time depends on the value of capacitance on the C
which is <5 ms for 10 µF capacitance. The smaller capacitance
of 440 nF on this pin enables lock times of <600 µs.
The N counter value cannot be changed while it is in power-
down because the part may not lock to the correct frequency on
power-up. If it is updated, the correct programming sequence
for it after power-up is to the R counter latch, followed by the
control latch, and finally the N counter latch, with the required
interval between the control latch and N counter latch, as de-
scribed in the Initial Power-Up section.
ADF4360-5
N
pin,