MAX3638ETM+ Maxim Integrated Products, MAX3638ETM+ Datasheet

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MAX3638ETM+

Manufacturer Part Number
MAX3638ETM+
Description
IC PLL CLOCK GEN LO JITT 48TQFN
Manufacturer
Maxim Integrated Products
Type
Clock Generator, Multiplexerr
Datasheet

Specifications of MAX3638ETM+

Pll
Yes with Bypass
Input
LVCMOS, LVPECL, LVTTL, Crystal
Output
LVCMOS, LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
3:10
Differential - Input:output
Yes/Yes
Frequency - Max
800MHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX3638 is a highly flexible, precision phase-
locked loop (PLL) clock generator optimized for the next
generation of network equipment that demands low-jitter
clock generation and distribution for robust high-speed
data transmission. The device features subpicosecond
jitter generation, excellent power-supply noise rejection,
and pin-programmable LVDS/LVPECL output interfaces.
The MAX3638 provides nine differential outputs and
one LVCMOS output, divided into three banks. The fre-
quency and output interface of each output bank can be
individually programmed, making this device an ideal
replacement for multiple crystal oscillators and clock dis-
tribution ICs on a system board, saving cost and space.
This 3.3V IC is available in a 7mm x 7mm, 48-pin TQFN
package and operates from -40°C to +85°C.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
19-4910; Rev 0; 10/09
Typical Application Circuits and Pin Configuration appear at
end of data sheet.
PCIe is a registered trademark of PCI-SIG Corp.
Programmable Clock Generator with 10 Outputs
Ethernet Switch/Router
Wireless Base Station
_______________________________________________________________ Maxim Integrated Products 1
General Description
XOUT
XIN
CIN
DIN
DIN
Low-Jitter, Wide Frequency Range,
PCIe
Processors
DDR/QDR Memory
LVCMOS
XO
Applications
M
, Network
MAX3638
PLL, DIVIDERS, MUXES
VCO
S
S
S
S
S
S
S
S
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Inputs
Outputs
Three Individual Output Banks
Wide VCO Tuning Range (3.83GHz to 4.025GHz)
Low Phase Jitter
Excellent Power-Supply Noise Rejection
-40NC to +85NC Operating Temperature Range
+3.3V Supply
MAX3638ETM+
Crystal Interface: 18MHz to 33.5MHz
LVCMOS Input: 15MHz to 160MHz
Differential Input: 15MHz to 350MHz
LVCMOS Output: Up to 160MHz
LVPECL/LVDS Outputs: Up to 800MHz
Pin-Programmable Dividers
Pin-Programmable Output Interface
0.34ps
0.14ps
PART
RMS
RMS
LVPECL/LVDS
LVPECL/LVDS
LVPECL/LVDS
LVPECL/LVDS
LVPECL/LVDS
LVPECL/LVDS
LVPECL/LVDS
LVPECL/LVDS
LVPECL/LVDS
LVCMOS
(12kHz to 20MHz)
(1.875MHz to 20MHz)
-40NC to +85NC
TEMP RANGE
Ordering Information
Functional Diagram
QA0
QA0
QA1
QA1
QA2
QA2
QA3
QA3
QA4
QA4
QB0
QB0
QB1
QB1
QB2
QB2
QC
QC
QCC
PIN-PACKAGE
48 TQFN-EP*
Features

Related parts for MAX3638ETM+

MAX3638ETM+ Summary of contents

Page 1

... RMS 0.14ps RMS Excellent Power-Supply Noise Rejection S -40NC to +85NC Operating Temperature Range S +3.3V Supply S , Network M PART MAX3638ETM+ +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. MAX3638 PLL, DIVIDERS, MUXES VCO Features (12kHz to 20MHz) (1.875MHz to 20MHz) Ordering Information TEMP RANGE PIN-PACKAGE -40NC to +85NC ...

Page 2

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs ABSOLUTE MAXIMUM RATINGS Supply Voltage Range ( CCA CCQA ................................-0.3V to +4.0V CCQB CCQC CCQCC Voltage Range at CIN, ...

Page 3

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs ELECTRICAL CHARACTERISTICS (continued +3.0V to +3.6V -40°C to +85°C. Typical values are CIN or DIN/DIN only when selected as the reference ...

Page 4

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs ELECTRICAL CHARACTERISTICS (continued +3.0V to +3.6V -40°C to +85°C. Typical values are CIN or DIN/DIN only when selected as the reference ...

Page 5

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs ELECTRICAL CHARACTERISTICS (continued +3.0V to +3.6V -40°C to +85°C. Typical values are CIN or DIN/DIN only when selected as the reference ...

Page 6

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs (V = 3.3V +25NC, unless otherwise noted SUPPLY CURRENT vs. TEMPERATURE (LVPECL OUTPUTS, ALL ENABLED) 500 PLL NORMAL, ALL OUTPUTS LOADED 450 400 350 300 PLL ...

Page 7

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs (V = 3.3V +25NC, unless otherwise noted OUTPUT SWING vs. OUTPUT FREQUENCY 3500 3000 LVCMOS 2500 LVPECL 2000 1500 LVDS 1000 500 0 10 100 OUTPUT ...

Page 8

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs (V = 3.3V +25NC, unless otherwise noted INTEGRATED PHASE JITTER (12kHz TO 20MHz) vs. TEMPERATURE 0.60 OUTPUT FREQUENCY = 125MHz 0.55 0.50 0.45 0.40 0.35 0.30 ...

Page 9

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs PIN NAME 1 DM LVCMOS/LVTTL Input. Three-level control for input divider M. See Table 3. 2 XIN Crystal Oscillator Input 3 XOUT Crystal Oscillator Output 4 V Core Power Supply. ...

Page 10

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs Detailed Description The MAX3638 is a low-jitter clock generator designed to operate over a wide range of frequencies. It consists of a selectable reference clock (on-chip crystal oscillator, LVCMOS input, ...

Page 11

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs output interface. A PLL bypass mode is also available for system testing or clock distribution. Crystal Oscillator The on-chip crystal oscillator provides the low-frequency reference clock for the PLL. This ...

Page 12

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs Table 3. Input Divider DIVIDER RATIO 0 ÷1 1 ÷2 NC ÷4 Note: When the on-chip XO is selected (IN_SEL = 0), the set- ting DM = ...

Page 13

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs During power-on, a power-on reset (POR) signal is gen- erated to synchronize all dividers. A reset signal is also generated if any control pin is changed. Outputs within a bank ...

Page 14

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs Table 11. Reference Frequencies and Divider Ratios for Various Applications PLL INPUT f FEEDBACK REF DIVIDER (MHz) DIVIDER (M) (F) 30. 61. 122. 33.3/66.7/ ...

Page 15

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs Power-Supply Filtering The MAX3638 is a mixed analog/digital IC. The PLL contains analog circuitry susceptible to random noise. To take full advantage of on-board filtering and noise attenuation, in addition ...

Page 16

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs Figure 6. Crystal Layout 1. 180kΩ CIN ESD STRUCTURES Figure 7. Equivalent CIN Circuit DC-COUPLED CIN XO AC-COUPLED 0.1µF CIN XO Figure 8. Interface to CIN 16 The ...

Page 17

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs LVPECL SOURCE DRIVING MAX3638 DIFFERENTIAL INPUT DC-COUPLED 150 Ω +3.3V DIN Ω LVPECL DIN Ω 150 Ω LVPECL SOURCE DRIVING MAX3638 DIFFERENTIAL INPUT AC-COUPLED ...

Page 18

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs DC-COUPLED LVPECL DRIVING THEVENIN EQUIVALENT TERMINATION +3.3V MAX3638 Q_ _ LVPECL Q_ _ AC-COUPLED LVPECL DRIVING INTERNAL 100 Ω DIFFERENTIAL TERMINATION +3.3V MAX3638 Q_ _ LVPECL Q_ _ AC-COUPLED LVPECL ...

Page 19

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs V V REG CC_ _ 50Ω 50Ω Figure 13. Equivalent LVDS Output Circuit DC-COUPLED LVDS OUTPUT DRIVING LVDS INPUT +3.3V MAX3638 Ω LVDS Q_ _ ...

Page 20

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs Layout Considerations The inputs and outputs are the most critical paths for the MAX3638; great care should be taken to minimize discontinuities on the transmission lines. Here are some suggestions ...

Page 21

Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs +3.3V 10.5Ω 10 µ F 0.1 µ CCA CC 27pF XIN 25MHz XOUT 33pF NC CIN NC DIN NC DIN IN_SEL PLL_BP DM DF1 NC DF0 +3.3V ...

Page 22

... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 22 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2009 Maxim Integrated Products © ...

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