DS1086Z+T&R Maxim Integrated Products, DS1086Z+T&R Datasheet - Page 11

IC ECONOSILL 3.3V SS 8-SOIC

DS1086Z+T&R

Manufacturer Part Number
DS1086Z+T&R
Description
IC ECONOSILL 3.3V SS 8-SOIC
Manufacturer
Maxim Integrated Products
Series
EconOscillator™r
Type
Spread Spectrum Clock Generatorr
Datasheet

Specifications of DS1086Z+T&R

Pll
No
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
No/No
Divider/multiplier
Yes/No
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
133MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
must be read from the RANGE register (last five bits). In
this example, 12h (18 decimal) was read from the
RANGE register. OS - 2 for this case is 10h (16 deci-
mal). This is the value that is written to the OFFSET reg-
ister.
Finally, the two-byte DAC value needs to be deter-
mined. Since OS - 2 only sets the range of frequencies,
the DAC selects one frequency within that range as
shown in Equation 3.
Valid values of DAC are 0 to 1023 (decimal) and 10kHz
is the step size. Equation 4 is derived from rearranging
Equation 3 and solving for DAC.
Since the two-byte DAC register is left justified, 655 is
converted to hex (028Fh) and bit-wise shifted left six
places. The value to be programmed into the DAC reg-
ister is A3C0h.
In summary, the DS1086 is programmed as follows:
PRESCALER = 03h (4% peak dither) or 13h (2% peak
dither)
OFFSET = OS - 2 or 10h (if range was read as 12h)
DAC = A3C0h
Notice that the DAC value was rounded. Unfortunately,
this means that some error is introduced. In order to
calculate how much error, a combination of Equation 1
and Equation 3 is used to calculate the expected out-
put frequency. See Equation 5.
f
OUTPUT
f
MASTER OSCILLATOR = (MIN FREQUENCY OF SELECTED OFFSET
DAC VALUE
f
DAC VALUE
OUTPUT
=
RANGE
(
MIN FREQUENCY OF SELECTED OFFSET
=
88 47
=
RANGE) + (DAC value x 10kHz)
=
.
655 36
)
( .
8
81 92
MIN FREQUENCY OF SELECTED
=
+
MHz
.
(
( .
DAC VALUE x
88 4736
(
f
MHz
MASTER OSCILLATOR
=
10
OFFSET RANGE
10
655
11 05875
)
kHz STEP SIZE
kHz STEP SIZE
prescaler
+
MHz
.
8
(
(
decimal
655
MHz
x
81 92
10
10
)
.
kHz STEP SIZE
Spread-Spectrum EconOscillator
kHz
____________________________________________________________________
)
MHz
)
)
=
)
(4)
(5)
The expected output frequency is not exactly equal to the
desired frequency of 11.0592MHz. The difference is
450Hz. In terms of percentage, Equation 6 shows that the
expected error is 0.004%. The expected error assumes
typical values and does not include deviations from the
typical as specified in the electrical tables.
Example #2: Calculate the register values needed to
generate a desired output frequency of 100MHz.
Since the desired frequency is already within the valid
master oscillator frequency range, the prescaler is set
to divide by 1, and hence, PRESCALER = 00h (for 4%
peak dither) or 10h (for 2% peak dither).
Next, looking at Table 2, OS + 1 provides a range of
frequencies centered around the desired frequency. In
order to determine what value to write to the OFFSET
register, the RANGE register must first be read.
Assuming 12h was read in this example, 13h (OS + 1)
is written to the OFFSET register.
Finally, the DAC value is calculated as shown in
Equation 8.
The result is then converted to hex (0110h) and then
left-shifted, resulting in 4400h to be programmed into
the DAC register.
In summary, the DS1086 is programmed as follows:
PRESCALER = 00h (4% peak dither) or 10h (2% peak
dither)
OFFSET = OS + 1 or 13h (if RANGE was read as 12h)
DAC = 4400h
f
DAC VALUE
OUTPUT
%
%
ERROR
ERROR
f
MASTER OSCILLATOR
=
EXPECTED
EXPECTED
( .
97 28
×
=
100
(
100 0
MHz
100 0
10
.
=
=
kHz STEP SIZE
MHz
=
.
)
1
11 0592
MHz
f
+
2
DESIRED
11 0592
.
0
450
= 100.0MHz x 2
(
.
272 10
Hz
97 28
=
f
MHz
×
DESIRED
.
MHz
100 0
11 0592
kHz
MHz
.
.
f
×
EXPECTED
MHz
)
100
)
11 05875
MHz
=
=
.
0
=
272 00
= 100.0MHz
0 004
×
.
.
MHz
100
(
%
decimal
)
(6)
(7)
(8)
(9)
11

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