DS1086LU-12F+T Maxim Integrated Products, DS1086LU-12F+T Datasheet - Page 13

IC ECONOSILL 3.3V SS 8-USOP

DS1086LU-12F+T

Manufacturer Part Number
DS1086LU-12F+T
Description
IC ECONOSILL 3.3V SS 8-USOP
Manufacturer
Maxim Integrated Products
Series
EconOscillator™r
Type
Spread Spectrum Clock Generatorr
Datasheet

Specifications of DS1086LU-12F+T

Pll
No
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
No/No
Frequency - Max
24.576MHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency-max
-
The expected output frequency is not exactly equal to the
desired frequency of 11.0592MHz. The difference is
450Hz. In terms of percentage, Equation 6 shows that the
expected error is 0.004%. The expected error assumes
typical values and does not include deviations from the
typical as specified in the electrical tables.
Example #2: Calculate the register values needed to
generate a desired output frequency of 50MHz.
Since the desired frequency is already within the valid
master oscillator frequency range, the prescaler is set
to divide by 1, and hence, PRESCALER = 0000h
(currently ignoring the other setting).
Next, looking at Table 2, OS + 1 provides a range of
frequencies centered around the desired frequency. To
determine what value to write to the OFFSET register,
the RANGE register must first be read. Assuming 12h
was read in this example, 13h (OS + 1) is written to the
OFFSET register.
Figure 4. 2-Wire Data Transfer Protocol
%
ERROR
f
MASTER OSCILLATOR
%
ERROR
SDA
SCL
EXPECTED
CONDITION
START
EXPECTED
______________________________________________________________________________________
=
11 0592
MSB
=
.
=
3.3V Spread-Spectrum EconOscillator
1
= 50.0MHz x 2
11 0592
f
DESIRED
.
MHz
450
11 0592
2
SLAVE ADDRESS
.
Hz
f
MHz
DESIRED
11 05875
MHz
f
.
×
EXPECTED
0
= 50.0MHz
100
6
MHz
=
7
0 004
×
×
.
DIRECTION
100
100
R/W
BIT
%
8
SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT
(6)
(7)
ACK
9
Finally, the DAC value is calculated as shown in
Equation 8.
The result is then converted to hex (0118h) and then
left-shifted, resulting in 4600h to be programmed into
the DAC register.
In summary, the DS1086L is programmed as follows:
PRESCALER = 0000h
OFFSET = OS + 1 or 13h (if RANGE was read as 12h)
DAC = 4600h
Since the expected output frequency is equal to the
desired frequency, the calculated error is 0%.
DAC VALUE
1
f
OUTPUT
2
REPEATED IF MORE BYTES
=
ARE TRANSFERRED
( .
50 0
3–7
5
=
kHz STEP SIZE
MHz
SIGNAL FROM RECEIVER
(
ACKNOWLEDGEMENT
48 6
8
.
MHz
48 6
50 0
ACK
.
)
9
.
MHz
+
1
2
MHz
(
0
280
)
=
=
×
280 00
50 0
OR REPEATED
5
CONDITION
CONDITION
kHz
START
.
STOP
.
MHz
)
(
=
decimal
)
(8)
(9)
13

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