SI5325B-C-GM Silicon Laboratories Inc, SI5325B-C-GM Datasheet - Page 16

• Manufacturer Part Number: SI5325B-C-GM
• Description: IC UP-PROG CLK MULTIPLIER 36-QFN
• Manufacturer: Silicon Laboratories Inc
• Type: Clock Multiplierr

Specifications of SI5325B-C-GM

• Number Of Circuits: 1
• Package / Case: 36-QFN
• Pll: Yes
• Input: Clock
• Output: CML, CMOS, LVDS, LVPECL
• Ratio - Input:output: 2:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 808MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 1.71 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 808MHz
• Maximum Input Frequency: 710 MHz
• Minimum Input Frequency: 10 MHz
• Output Frequency Range: 10 MHz to 808 MHz
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.71 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5325
Reset value = 0000 0101
16
Register 3.
Name
Type
Bit
7:6
3:0
Bit
5
4
CKSEL_REG
Reserved
SQ_ICAL
Reserved
CKSEL_REG [1:0]
Name
D7
[1:0]
R/W
CKSEL_REG.
If the device is operating in register-based manual clock selection mode
(AUTOSEL_REG = 00), and CKSEL_PIN = 0, then these bits select which input clock
will be the active input clock. If CKSEL_PIN = 1 and AUTOSEL_REG = 00, the CS_CA
input pin continues to control clock selection and
00: CKIN_1 selected.
01: CKIN_2 selected.
10: Reserved
11: Reserved
Reserved.
SQ_ICAL.
This bit determines if the output clocks will remain enabled or be squelched (disabled)
during an internal calibration. See Table 4 on page 46.
0: Output clocks enabled during ICAL.
1: Output clocks disabled during ICAL.
Reserved.
D6
Reserved
D5
R
Preliminary Rev. 0.4
SQ_ICAL
R/W
D4
Function
D3
CKSEL_REG is of no consequence
D2
Reserved
R
D1
.
D0