PI6C2401WE Pericom Semiconductor, PI6C2401WE Datasheet

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PI6C2401WE

Manufacturer Part Number
PI6C2401WE
Description
IC PLL CLOCK DRIVER 8-SOIC
Manufacturer
Pericom Semiconductor
Type
PLL Clock Driverr
Datasheet

Specifications of PI6C2401WE

Pll
Yes with Bypass
Input
TTL
Output
TTL
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
No/No
Frequency - Max
134MHz
Divider/multiplier
No/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC
Frequency-max
134MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Product Features
• High-Performance Phase-Locked-Loop Clock Distribution for
• Zero Input-to-Output delay
• Low jitter: Cycle-to-Cycle jitter ± 100ps max.
• On-chip series damping resistor at clock output drivers
• Operates at 3.3V V
• Packaged in Plastic 8-pin SOIC Package (W)
• Wide range of Clock Frequencies
Logic Block Diagram
Reference
Figure 1. This Combination Provides Zero-Delay Between
FB_IN
Networking, ATM, 100/134 MHz Registered DIMM Synchro-
nous DRAM modules for server/workstation/PC applications
for low noise and EMI reduction
Pb-free and Green Available
CLK_IN
Clock
Signal
08-0298
the Reference Clocks Signal and 17 Outputs
S
Zero Delay
PI6C2401
CC
Buffer
PLL
Feedback
CLK_OUT
Non-Zero
18 Output
Delay
Buffer
CLK_OUT
17
1
Product Description
The PI6C2401 features a low-skew, low-jitter, phase-locked loop
(PLL) clock driver. By connecting the feedback CLK_OUT output
to the feedback FB_IN input, the propagation delay from the
CLK_IN input to any clock output will be nearly zero.
Application
If the system designer needs more than 16 outputs with the features
just described, using two or more zero-delay buffers such as
PI6C2509Q, and PI6C2510Q, is likely to be impractical. The device-
to-device skew introduced can significantly reduce
the performance. Pericom recommends the use of a zero-delay
buffer and an eighteen output non-zero-delay buffer . As shown in
Figure 1, this combination produces a zero-delay buffer with all the
signal characteristics of the original zero-delay buffer, but with as
many outputs as the non-zero-delay buffer part. For example, when
combined with an eighteen output non-zero delay buffer, a system
designer can create a seventeen-output zero-delay buffer.
Product Pin Configuration
Control Input
CLK_OUT
S
0
1
CLK_IN
AGND
AV
CC
Phase-Locked Loop Clock Driver
O
1
2
3
4
u
p t
C
L
t u
P
K
L
S
L
_
8-Pin
N I
o
W
r u
e c
8
7
6
5
P
L
L
FB_IN
V
GND
S
PI6C2401
PS8419D
CC
S
h
N
Y
t u
o d
w
n
11/13/08

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PI6C2401WE Summary of contents

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... Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging Tape/Reel Pb-free & Green Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 08-0298 .149 3.78 .157 3.99 1.35 .053 1.75 .068 SEATING PLANE 0.10 .0040 0.25 .0098 Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 • ...

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