IDT23S08T-1DC IDT, Integrated Device Technology Inc, IDT23S08T-1DC Datasheet - Page 3

• Manufacturer Part Number: IDT23S08T-1DC
• Description: IC CLK MULT PLL ZD 2.5V 16-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Multiplier, Zero Delay Bufferr

Specifications of IDT23S08T-1DC

• Pll: Yes with Bypass
• Input: LVTTL
• Output: LVTTL
• Number Of Circuits: 1
• Ratio - Input:output: 1:8
• Differential - Input:output: No/No
• Frequency - Max: 133.3MHz
• Divider/multiplier: No/No
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC
• Frequency-max: 133MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 23S08T-1DC

FUNCTION TABLE
NOTE:
1. H = HIGH Voltage Level
AVAILABLE OPTIONS FOR IDT23S08T
NOTES:
1. Contact factory for availability.
2. Output phase is indeterminant (0° or 180° from input clock).
SPREAD SPECTRUM COMPATIBLE
off the Spread Spectrum feature of the reference input, assuming it exists. When a zero delay buffer is not designed to pass the Spread Spectrum feature
through, the result is a significant amount of tracking skew, which may cause problems in systems requiring synchronization.
OPERATING CONDITIONS
NOTE:
1. Applies to both REF and FBK.
ZERO DELAY AND SKEW CONTROL
will be driving a total load of 7pF plus any additional load that it drives. The relative loading of this output (with respect to the remaining outputs) can adjust
the input-output delay.
loaded equally, for zero output-output skew.
IDT23S08T
2.5V ZERO DELAY CLOCK MULTIPLIER
Many systems being designed now use a technology called Spread Spectrum Frequency Timing Generation. This product is designed not to filter
Symbol
To close the feedback loop of the IDT23S08T, the FBK pin can be driven from any of the eight available output pins. The output driving the FBK pin
For applications requiring zero input-output delay, all outputs including the one providing feedback should be equally loaded. Ensure the outputs are
L = LOW Voltage Level
V
C
C
T
DD
A
L
IN
IDT23S08T-2
IDT23S08T-2
IDT23S08T-3
IDT23S08T-3
IDT23S08T-4
IDT23S08T-5
IDT23S08T-1
S2
Device
H
H
L
L
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance from 10MHz to 133MHz
Input Capacitance
(1)
(1)
(1)
(1)
(1)
(1)
Parameter
(1)
S1
H
H
L
L
(1)
SELECT INPUT DECODING
Bank A or Bank B
Bank A or Bank B
Bank A or Bank B
Feedback From
Bank A
Bank B
Bank A
Bank B
Tri-State
CLK A
Driven
Driven
Driven
Test Conditions
3
Tri-State
Tri-State
CLK B
Driven
Driven
Bank A Frequency
2 x Reference
2 x Reference
4 x Reference
2 x Reference
Reference/2
Reference
Reference
Min.
2.3
—
—
0
COMMERCIAL TEMPERATURE RANGE
Output Source
REF
PLL
PLL
PLL
Max.
Reference or Reference
2.7
70
15
7
Bank B Frequency
2 x Reference
2 x Reference
Reference/2
Reference/2
Reference
Reference
PLL Shut Down
Y
N
Y
N
Unit
°
pF
pF
V
C
(2)