MK1574-01SLFTR IDT, Integrated Device Technology Inc, MK1574-01SLFTR Datasheet
MK1574-01SLFTR
Specifications of MK1574-01SLFTR
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MK1574-01SLFTR Summary of contents
Page 1
... VOLT FRAME RATE COMMUNICATIONS PLL Description The MK1574 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to the 8 kHz backplane clock, simplifying clock generation and distribution in communications systems ...
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... CLOCK SYNTHESIZER CLK2 CLK3 pin 11 pin 12 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 11.76 5.88 7.84 3.92 11.04 5.52 10.56 5.28 7.68 3.84 25.92 12.96 8.448 4.224 6.312 3.156 32.768 16.384 24.704 12.352 4.096 2.048 3.088 1.544 MK1574 REV F 111605 ...
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... Input External Components The MK1574 requires a minimum number of external components for proper operation network (see the section “Loop Bandwidth and Loop Filter Component Selection”) should be connected between CAP1 and CAP2 as close tot he device as possible. Decoupling capacitors of 0.01µF should be connected between VDD and GND on pins and 7, as close to the device as possible. A series termination resistor of 33Ω ...
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... VOLT FRAME RATE COMMUNICATIONS PLL Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK1574. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. ...
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... Symbol Conditions θ Still air JA θ 1 m/s air flow JA θ 3 m/s air flow JA θ JC Equation 1 5 CLOCK SYNTHESIZER Min. Typ. Max. Units 8.000 kHz 1 ppm Min. Typ. Max. Units °C/W 120 °C/W 115 °C/W 105 °C/W 58 MK1574 REV F 111605 ...
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... A good value for the damping factor ζ is 0.707. From equation 2, 0.707 * 6.2 = 34.7 kΩ (36 kΩ nearest standard value 16E-9 IDT™ / ICS™ 3.3 VOLT FRAME RATE COMMUNICATIONS PLL Equation 2; ζ (zeta) is the damping factor 6 CLOCK SYNTHESIZER MK1574 REV F 111605 ...
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... PC Board Layout A proper board layout is critical to the successful use of the MK1574. In particular, the CAP1 and CAP2 pins are very sensitive to noise and leakage (CAP1 at pin 4 is the most sensitive). Traces must be as short as possible and the capacitor and resistor must be mounted next to the device as shown to the right. The capacitor connected between pins 3 and 5 is the power supply decoupling capacitor. The high frequency output clocks on may benefit from a series 33Ω ...
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... MK1574 3.3 VOLT FRAME RATE COMMUNICATIONS PLL Clock Multipliers/Accuracies In the table on page 2 are the actual multipliers stored in the MK1574 ROM, which yield the exact values shown for the output clocks. Package Outline and Package Dimensions Package dimensions are kept current with JEDEC Publication No. 95 ...
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... VOLT FRAME RATE COMMUNICATIONS PLL Ordering Information Part / Order Number Marking MK1574-01S MK1574-01S MK1574-01STR MK1574-01S MK1574-01SLF MK1574-01SLF MK1574-01SLFTR MK1574-01SLF MK1574-01SI MK1574-01SI MK1574-01SITR MK1574-01SI MK1574-01SILF MK1574-01SILF MK1574-01SILFTR MK1574-01SILF Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. ...
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... MK1574 3.3 VOLT FRAME RATE COMMUNICATIONS PLL Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) © ...