CY2292F Cypress Semiconductor Corp, CY2292F Datasheet
CY2292F
Specifications of CY2292F
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CY2292F Summary of contents
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... Features • Three integrated phase-locked loops • EPROM programmability • Factory-programmable (CY2292) or field-program- mable (CY2292F) device options • Low-skew, low-jitter, high-accuracy outputs • Power-management options (Shutdown, OE, Suspend) • Frequency select option • Smooth slewing on CPUCLK • Configurable 3. operation • 16-pin SOIC Package (TSSOP: F only) ...
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Pin Configurations Pin Summary Pin Number Name CY2292 CLKC GND 3, 11 [1] XTALIN 4 [1, 2] XTALOUT 5 XBUF 6 CLKD 7 CPUCLK 8 CLKB 9 CLKA S2/SUSPEND 15 ...
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... FTG programmers connect serial port and allow users [4] of CyClocks software to quickly and easily program any of the CY2291F, CY2292F, CY2071AF, and CY2907F devices. The ordering code for the Cypress FTG Programmer is CY3670. Custom Configuration Request Procedure The CY229x are EPROM-programmable devices that may be configured in the factory or in the field by a Cypress Field Appli- cation Engineer (FAE) ...
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... Except crystal pins [9] Except crystal pins – 0. +0.5V IN Three-state outputs Commercial Max., 3.3V operation DD DD [10] Shutdown active CY2292/CY2292F be connected to the Xout pin. DD =10+0.06•(F +F +2•F )+0.27•(F DD CPLL UPLL SPLL CLKA Part Numbers Min. 4.5 3.0 0 −40 10.0 1 Conditions Min ...
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... Document #: 38-07449 Rev. *B Conditions [9] Except crystal pins [9] Except crystal pins – 0. +0.5V IN Three-state outputs Industrial Max., 5V operation DD DD Shutdown active CY2292I/CY2292FI Conditions [9] Except crystal pins [9] Except crystal pins – 0. +0.5V IN Three-state outputs Indus Max., 3.3V operation DD DD ...
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... CY2292F ÷ > 66 MHz OUT ÷ < 66 MHz OUT [13] [13] [3, 12, 14] max. – < 4 MHz) OUT max. – < 16 MHz) OUT OUT > 50 MHz) OUT CY2292 CY2292F Min. Typ. Max. <0 <0 < <400 500 OUT <250 350 <25 50 <0. 100 20 90 Min ...
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... MHz) OUT max. – < 16 MHz) OUT < 50 MHz) OUT > 50 MHz) OUT CY2292I CY2292FI Description CY2292I CY2292FI [12] ÷ > 66 MHz [12] ÷ < 66 MHz [13] [13] [3, 12, 14] Min. Typ. Max. 11.1 13000 (90 MHz) (76.923 kHz) 12 ...
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... OLD SELECT F old CPU Document #: 38-07449 Rev. *B (continued) Description max. – t min.), 9A 9A < 4 MHz) OUT max. – t min < 16 MHz) OUT < 50 MHz) OUT > 50 MHz) CY2292I CY2292FI NEW SELECT STABLE t & new CY2292 Min. Typ. Max. < 0.5 1 < 0.7 1 < ...
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... SOIC CY2292FXCT 16-Pin SOIC – Tape and Reel CY2292SXI–XXX 16-Pin SOIC CY2292SXI–XXXT 16-Pin SOIC – Tape and Reel CY2292FXI 16-Pin SOIC CY2292FXIT 16-Pin SOIC – Tape and Reel CY2292FZX 16-Pin TSSOP CY2292FZXT 16-Pin SOIC – Tape and Reel Document #: 38-07449 Rev ...
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... Document #: 38-07449 Rev. *B © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...
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Document History Page Document Title: CY2292 Three-PLL General-Purpose EPROM Programmable Clock Generator Document Number: 38-07449 REV. ECN NO. Issue Date ** 116993 07/01/02 *A 119639 12/05/02 *B 277130 See ECN Document #: 38-07449 Rev. *B Orig. of Change DSG Changed ...