IDT2308-1DC IDT, Integrated Device Technology Inc, IDT2308-1DC Datasheet

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IDT2308-1DC

Manufacturer Part Number
IDT2308-1DC
Description
IC CLK MLTPLR ZDB 1:4 16SOIC
Manufacturer
IDT, Integrated Device Technology Inc
Type
Multiplier, Zero Delay Bufferr
Datasheet

Specifications of IDT2308-1DC

Pll
Yes with Bypass
Input
LVTTL
Output
LVTTL
Number Of Circuits
1
Ratio - Input:output
1:8
Differential - Input:output
No/No
Frequency - Max
133.3MHz
Divider/multiplier
No/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SOIC
Frequency-max
133.3MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
2308-1DC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT2308-1DCG
Manufacturer:
IDT
Quantity:
20 000
Part Number:
IDT2308-1DCGI8
Manufacturer:
IDT
Quantity:
8 000
Part Number:
IDT2308-1DCI
Manufacturer:
IDT
Quantity:
20 000
FEATURES:
• Phase-Lock Loop Clock Distribution for Applications ranging
• Distributes one clock input to two banks of four outputs
• Separate output enable for each output bank
• External feedback (FBK) pin is used to synchronize the outputs
• Output Skew <200 ps
• Low jitter <200 ps cycle-to-cycle
• 1x, 2x, 4x output options (see table):
• No external RC network required
• Operates at 3.3V V
• Available in SOIC and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2308
3.3V ZERO DELAY CLOCK MULTIPLIER
c
from 10MHz to 133MHz operating frequency
to the clock input
– IDT2308-1 1x
– IDT2308-2 1x, 2x
– IDT2308-3 2x, 4x
– IDT2308-4 2x
– IDT2308-1H, -2H, and -5H for High Drive
2010
Integrated Device Technology, Inc.
DD
REF
FBK
S2
S1
16
1
8
9
(-3, -4)
(-5)
2
2
3.3V ZERO DELAY
CLOCK MULTIPLIER
PLL
Control
Logic
1
(-2, -3)
DESCRIPTION:
designed to address high-speed clock distribution and multiplication applica-
tions. The zero delay is achieved by aligning the phase between the incoming
clock and the output clock, operable within the range of 10 to 133MHz.
select addresses. By proper selection of input addresses, both banks can be
put in tri-state mode. In test mode, the PLL is turned off, and the input clock
directly drives the outputs for system testing purposes. In the absence of an
input clock, the IDT2308 enters power down, and the outputs are tri-stated. In
this mode, the device will draw less than 25μA.
scaling and multiplication of the Input REF Clock. (See available options
table.)
to control the delay between the input clock and the outputs.
The IDT2308 is a high-speed phase-lock loop (PLL) clock multiplier. It is
The IDT2308 has two banks of four outputs each that are controlled via two
The PLL is closed externally to provide more flexibility by allowing the user
The IDT2308 is characterized for both Industrial and Commercial operation.
The IDT2308 is available in six unique configurations for both pre-
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
2
10
11
7
6
2
3
14
15
CLKA1
CLKA2
CLKA3
CLKA4
CLKB1
CLKB2
CLKB3
CLKB4
MAY 2010
IDT2308
DSC 5173/12

Related parts for IDT2308-1DC

IDT2308-1DC Summary of contents

Page 1

... The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range 133MHz. The IDT2308 has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode ...

Page 2

... IDT2308 3.3V ZERO DELAY CLOCK MULTIPLIER PIN CONFIGURATION 1 REF 2 CLKA1 3 CLKA2 GND 6 CLKB1 7 CLKB2 8 S2 SOIC/ TSSOP TOP VIEW PIN DESCRIPTION Pin Number Functional Description REF 1 Input Reference Clock, 5 Volt Tolerant Input (1) CLKA1 2 Clock Output for Bank A (2) CLKA2 3 Clock Output for Bank A ...

Page 3

... FUNCTION TABLE SELECT INPUT DECODING NOTE HIGH Voltage Level L = LOW Voltage Level AVAILABLE OPTIONS FOR IDT2308 Device IDT2308-1 IDT2308-1H IDT2308-2 IDT2308-2 IDT2308-2H IDT2308-2H IDT2308-3 IDT2308-3 IDT2308-4 IDT2308-5H NOTE: 1. Output phase is indeterminant (0° or 180° from input clock). COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ...

Page 4

... ZERO DELAY AND SKEW CONTROL To close the feedback loop of the IDT2308, the FBK pin can be driven from any of the eight available output pins. The output driving the FBK pin will be driving a total load of 7pF plus any additional load that it drives. The relative loading of this output (with respect to the remaining outputs) can adjust the input-output delay ...

Page 5

... IDT2308 3.3V ZERO DELAY CLOCK MULTIPLIER OPERATING CONDITIONS- COMMERCIAL Symbol Parameter V Supply Voltage DD T Operating Temperature (Ambient Temperature Load Capacitance below 100MHz L Load Capacitance from 100MHz to 133MHz C Input Capacitance (1) IN NOTE: 1. Applies to both REF and FBK. DC ELECTRICAL CHARACTERISTICS - COMMERCIAL Symbol Parameter ...

Page 6

... Cycle to Cycle Jitter tJ (-2, -2H, -3) t PLL Lock Time LOCK NOTE: 1. IDT2308-5H has maximum input frequency of 133.33 MHz and maximum output of 66.67MHz. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Conditions 30pF Load, all devices 20pF Load, -1H, -2H, -5H Devices (1) 15pF Load, -1, -2, -3, -4 devices Measured at 1.4V ...

Page 7

... IDT2308 3.3V ZERO DELAY CLOCK MULTIPLIER OPERATING CONDITIONS- INDUSTRIAL Symbol Parameter V Supply Voltage DD T Operating Temperature (Ambient Temperature Load Capacitance below 100MHz L Load Capacitance from 100MHz to 133MHz C Input Capacitance (1) IN NOTE: 1. Applies to both REF and FBK. DC ELECTRICAL CHARACTERISTICS - INDUSTRIAL Symbol Parameter ...

Page 8

... Cycle to Cycle Jitter tJ (-2, -2H, -3) t PLL Lock Time LOCK NOTE: 1. IDT2308-5H has maximum input frequency of 133.33 MHz and maximum output of 66.67MHz. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Conditions 30pF Load, all devices 20pF Load, -1H, -2H, -5H Devices (1) 15pF Load, -1, -2, -3, -4 devices Measured at 1.4V ...

Page 9

... IDT2308 3.3V ZERO DELAY CLOCK MULTIPLIER SWITCHING WAVEFORMS Output FBK, Device 2 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES t1 t2 1.4V 1.4V Duty Cycle Timing 0.8V 0. All Outputs Rise/Fall Time 1.4V Output 1.4V Output t5 Output to Output Skew Input V FBK t6 Input to Output Propagation Delay FBK, Device 1 ...

Page 10

... NOTES: 1. Duty Cycle is taken from typical chip measured at 1.4V data is calculated from I = ICORE + nCVf, where ICORE is the Unloaded Current (n = Number of Outputs Capacitance Load per Output (F Voltage Supply(V Frequency (Hz). COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES AND I TRENDS FOR IDT2308- AND 4 (1) ( 33MHz 50 66MHz ...

Page 11

... NOTES: 1. Duty Cycle is taken from typical chip measured at 1.4V data is calculated from I = ICORE + nCVf, where ICORE is the Unloaded Current (n = Number of Outputs Capacitance Load per Output (F Voltage Supply(V Frequency (Hz). COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES AND I TRENDS FOR IDT2308-1H, -2H, AND -5H (1) ( 33MHz 50 66MHz ...

Page 12

... IDT2308 3.3V ZERO DELAY CLOCK MULTIPLIER TEST CIRCUITS TEST CIRCUIT CLK OUT 0.1 F OUTPUTS V DD 0.1 F GND GND Test Circuit for all Parameters Except t8 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 0 LOAD 0.1 F GND Test Circuit for t8, Output Slew Rate On -1H, -2H, and -5H Device ...

Page 13

... IDT2308 3.3V ZERO DELAY CLOCK MULTIPLIER Ordering Information "G" after the two-letter package code are the Pb-Free configuration and are RoHS compliant. "8" suffix denotes Tape and Reel packaging. -1H, -2H, and -5H designate ZDB with High drive; all others are ZDB with Standard drive. ...

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