AD9516-0/PCBZ Analog Devices Inc, AD9516-0/PCBZ Datasheet - Page 2

• Manufacturer Part Number: AD9516-0/PCBZ
• Description: IC CLOCK GEN 2.8GHZ VCO 64-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Clock Generatorr

Specifications of AD9516-0/PCBZ

• Package / Case: 64-LFCSP
• Mounting Type: Surface Mount
• Voltage - Supply: 3.135 V ~ 3.465 V
• Frequency-max: 2.95GHz
• Operating Temperature: -40°C ~ 85°C
• Output: CMOS, LVDS, LVPECL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Input: -

AD9516-0
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
Timing Diagrams............................................................................ 15
Absolute Maximum Ratings.......................................................... 16
Power Supply Requirements ....................................................... 4
PLL Characteristics ...................................................................... 4
Clock Inputs .................................................................................. 6
Clock Outputs ............................................................................... 6
Timing Characteristics ................................................................ 7
Clock Output Additive Phase Noise
(Distribution Only; VCO Divider Not Used)........................... 8
Clock Output Absolute Phase Noise (Internal VCO Used).... 9
Clock Output Absolute Time Jitter
(Clock Generation Using Internal VCO) ................................ 10
Clock Output Absolute Time Jitter
(Clock Cleanup Using Internal VCO) ..................................... 10
Clock Output Absolute Time Jitter
(Clock Generation Using External VCXO) ............................ 10
Clock Output Additive Time Jitter
(VCO Divider Not Used) .......................................................... 11
Clock Output Additive Time Jitter (VCO Divider Used) ..... 11
Delay Block Additive Time Jitter.............................................. 12
Serial Control Port ..................................................................... 12
PD , SYNC , and RESET Pins ..................................................... 13
LD, STATUS, and REFMON Pins............................................ 13
Power Dissipation....................................................................... 14
Rev. A | Page 2 of 80
Pin Configuration and Function Descriptions........................... 17
Typical Performance Characteristics ........................................... 19
Terminology .................................................................................... 25
Detailed Block Diagram ................................................................ 26
Theory of Operation ...................................................................... 27
Serial Control Port ......................................................................... 50
Thermal Performance.................................................................... 54
Register Map Overview ................................................................. 55
Register Map Descriptions ............................................................ 59
Applications Information .............................................................. 77
Outline Dimensions ....................................................................... 80
Thermal Resistance .................................................................... 16
ESD Caution................................................................................ 16
Operational Configurations...................................................... 27
Digital Lock Detect (DLD) ....................................................... 36
Clock Distribution ..................................................................... 40
Reset Modes ................................................................................ 48
Power-Down Modes .................................................................. 49
Serial Control Port Pin Descriptions....................................... 50
General Operation of Serial Control Port............................... 50
The Instruction Word (16 Bits) ................................................ 51
MSB/LSB First Transfers ........................................................... 51
Frequency Planning Using the AD9516.................................. 77
Using the AD9516 Outputs for ADC Clock Applications.... 77
LVPECL Clock Distribution ..................................................... 78
LVDS Clock Distribution .......................................................... 78
CMOS Clock Distribution ........................................................ 79
Ordering Guide .......................................................................... 80