SKY72300-21 Skyworks Solutions Inc, SKY72300-21 Datasheet - Page 2

IC SYNTHESIZER 2.1GHZ 28-EPTSSOP

SKY72300-21

Manufacturer Part Number
SKY72300-21
Description
IC SYNTHESIZER 2.1GHZ 28-EPTSSOP
Manufacturer
Skyworks Solutions Inc
Type
Fractional N Synthesizerr
Datasheet

Specifications of SKY72300-21

Pll
Yes
Input
Clock, Crystal
Output
Clock, Crystal
Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
2.1GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
Frequency-max
2.1GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
863-1076-2

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Part Number
Manufacturer
Quantity
Price
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Manufacturer:
TI
Quantity:
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Manufacturer:
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Part Number:
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Quantity:
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DATA SHEET • SKY72300-21 FREQUENCY SYNTHESIZER
The SKY72300-21 has a frequency power steering circuit that
helps the loop filter to steer the VCO when the frequency is too
fast or too slow, further enhancing acquisition time.
The unit operates with a three-wire, high-speed serial interface. A
combination of large bandwidth, fine resolution, and the three-
wire, high-speed serial interface allows for a direct frequency
modulation of the VCO. This supports any continuous phase,
constant envelope modulation scheme such as Frequency
Modulation (FM), Frequency Shift Keying (FSK), Minimum Shift
Keying (MSK), or Gaussian Minimum Shift Keying (GMSK).
2
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
September 11, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 101217N
Mod_in
Clock
Data
CS
Fvco_main
Fvco_main
Interface
Serial
Xtalacgnd/OSC
VCCcml_main
Divider
Lock Detection or
GNDcp_main
Main
VCCcp_main
Power Steering
CPout_main
VSUBdigital
Fvco_main
Fvco_main
LD/PSmain
Xtalin/OSC
Mux_out
GNDcml
Mod_in
Figure 1. SKY72300-21 Functional Block Diagram
Modulation
Figure 2. SKY72300-21 Pinout, 28-Pin EP-TSSOP
Clock
Data
Modulation
18-Bit
Unit
ΔΣ
Fractional
Divider
Main
Unit
CPout_main
MSB/LSB
Dividend
Fpd_main
Main
1
2
3
4
5
6
7
8
9
10
11
12
13
14
LD/PSmain
Charge Pump
Phase/Freq.
Detector
Main
Divider
and
Main
(Top View)
Fref_main
Modulation
Control
Registers
Reference
Frequency
Reference
Frequency
Oscillator
Oscillator
Fref
This capability can eliminate the need for In-phase and
Quadrature (I/Q) Digital-to-Analog Converters (DACs), quadrature
upconverters, and IF filters from the transmitter portion of the
radio system.
Figure 1 shows a functional block diagram for the SKY72300-21.
The device package and pinout for the 28-pin Exposed Pad Thin
Shrink Small Outline Package (EP-TSSOP) are shown in Figure 2.
Ref Freq
Dividers
Fref_aux
Charge Pump
Divider
Phase/Freq.
Aux
Auxiliary
Detector
and
LD/PSaux
& Pwr-Dn/Mux Out
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PD/Charge Pump
Fpd_aux
CPout_aux
Control
Mux
Fractional
Auxiliary
Divider
CS
Data
VCCdigital
GNDdigital
VCCcml_aux
VCCvco_aux
Fvco_aux
GNDcp_aux
CPout_aux
VCCcp_aux
LD/PSaux
GNDxtal
VCCxtal
Xtalout/NC
Unit
Dividend
10-Bit
Lock Detection or
Power Steering
C1412
ΔΣ
Aux
Prescaler
Auxiliary
Fvco_aux
Fvco_aux
Mux_out
C1447

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